Abstract: A radio frequency identification transceiver is disclosed. The radio frequency identification transceiver includes: a transmitter path, including; a pulse shaper to tunably shape the pulse of a signal to be transmitted in different predefined frequency ranges; a modulator to modulate the shaped pulse to be transmitted into one of a plurality of predefined frequency ranges; a receiver path, including: a demodulator to demodulate a received signal from a plurality of predefined frequency ranges.

Abstract: A radio frequency identification transceiver is disclosed. The radio frequency identification transceiver includes: a transmitter path, including; a pulse shaper to tunably shape the pulse of a signal to be transmitted in different predefined frequency ranges; a modulator to modulate the shaped pulse to be transmitted into one of a plurality of predefined frequency ranges; a receiver path, including: a demodulator to demodulate a received signal from a plurality of predefined frequency ranges.

Abstract: An envelope detection circuit includes a signal rectifier, first and second capacitors, and first, second and third transistors. The signal rectifier includes an input port coupled to receive a modulated input signal, and an output port. The first capacitor has a first port coupled to the output port of the signal rectifier and a second port for coupling to a signal ground. The first transistor has a first port coupled to the output port of the signal rectifier, a second port for coupling to a signal ground, and a control port. The second transistor has a first port for coupling to a power supply, a second port, and a control port coupled to the output of the signal rectifier. The third transistor has a first port coupled to second port of the second transistor, a second port for coupling to a signal ground, and a control port. The second capacitor has a first port coupled to first port of the third transistor, and a second port for coupling to a signal ground.

Abstract: A temperature compensating biasing circuit is constructed by first determining a piecewise function substantially describing a required bias current with respect to temperature. Reference signals are created such that each reference signal describes an amount of contributing currents that, when summed together, generate a master biasing current. The biasing current generator is further constructed to create a thermal signal indicating an operating temperature. Each of the reference signals is compared to the thermal signal. The biasing current generator then identifies which of the contributing currents or portions of the contributing currents are being included to generate the master biasing current. The identified contributing currents and the portions of the contributing currents are then summed to form the master biasing current. The master biasing current may be mirrored to form bias currents that have the temperature compensation bias function.

Abstract: A high frequency CMOS differential amplifier which comprises: a variable gain amplifier which amplifies differential input; a temperature sensing circuit; a gain-slope correction circuit which produces an intermediate control voltage as a function of temperature, thereby compensating for a change in slope of the gain control characteristics with temperature of the variable gain amplifier; a gain compensation circuit which is used to correct temperature/process variations of MOS transistors in high frequency differential amplifiers; and a bias control circuit.

Abstract: A temperature compensating biasing circuit is constructed by first determining a piecewise function substantially describing a required bias current with respect to temperature. Reference signals are created such that each reference signal describes an amount of contributing currents that, when summed together, generate a master biasing current. The biasing current generator is further constructed to create a thermal signal indicating an operating temperature. Each of the reference signals is compared to the thermal signal. The biasing current generator then identifies which of the contributing currents or portions of the contributing currents are being included to generate the master biasing current. The identified contributing currents and the portions of the contributing currents are then summed to form the master biasing current. The master biasing current may be mirrored to form bias currents that have the temperature compensation bias function.

Abstract: A high frequency differential amplifier with a circuit topology which ensures that bias currents of the high transconductance differential transistors with minimum channel length are exactly equal, i.e., each differential transistor carries exactly half of the total current I0 of the differential amplifier. This is achieved by coupling each differential transistor via its own current source to the reference potential. To insure a good match between the current sources, the current source devices are made with long channel lengths. Impedances are coupled between the junctions of each differential transistor pair and its current source to insure good AC gain. For the variable gain differential amplifier the spread in the gain control characteristics is reduced by making the aspect ratio of the first pair of differential transistors larger than that of the second pair of differential transistors.