Abstract: Provided is a memory device with improved threshold voltage distribution and an operating method of the memory device. The memory device includes a memory cell array including a plurality of memory cells, a voltage generator configured to generate a program voltage and a verification voltage applied to the plurality of memory cells during a data write operation, and a control logic configured to control multiple program loops to program the memory cells to multiple program states during the data write operation and configured to determine whether programming passes or fails in the multiple program loops, wherein the control logic controls the program loops to verify one or more (n+1)-th memory cells to be programmed to an (n+1)-th program state by using a verify condition for verifying an n-th program state in at least one of the multiple program loops (n is an integer greater than or equal to 1).

Abstract: A photolithography method is provided. The photolithography method includes forming a photoresist layer on a wafer, exposing a portion of the photoresist layer by using an exposure device and a mask, and forming a photoresist pattern by removing a non-exposed portion of the photoresist layer. The mask includes a substrate having a main pattern area and a blocking area outside the main pattern area, a main pattern on the main pattern area of the substrate, and a blocking pattern on the blocking area of the substrate. An external circumference of the blocking pattern extends to the maximum area of the mask that may be illuminated by the exposure device or to the outside of the maximum area of the mask.

Abstract: A photolithography method is provided. The photolithography method includes forming a photoresist layer on a wafer, exposing a portion of the photoresist layer by using an exposure device and a mask, and forming a photoresist pattern by removing a non-exposed portion of the photoresist layer. The mask includes a substrate having a main pattern area and a blocking area outside the main pattern area, a main pattern on the main pattern area of the substrate, and a blocking pattern on the blocking area of the substrate. An external circumference of the blocking pattern extends to the maximum area of the mask that may be illuminated by the exposure device or to the outside of the maximum area of the mask.

Abstract: A semiconductor device may include a media controller configured to output a write requested address when a write request to a nonvolatile memory device is provided from a host; and a cold address manager. The cold address manager may include a stack storing meta data for the write requested address, region information storage configured to manage addresses of the nonvolatile memory device with regions such that length of a region of the regions may vary after a predetermined period, a cold address detector configured to update the stack and the region information storage after the predetermined period and to detect whether an address of the nonvolatile memory device is a cold address, the cold address having write requests performed at less than a predetermined level.

Abstract: A semiconductor device may include a media controller configured to output an address in response to receiving a write request for writing to a nonvolatile memory. The semiconductor device may also include a hot address detector. The hot address detector is configured to store a list including the address output from the media controller and including meta data related to the address, to update the meta data according to the address output from the media controller, to determine whether the address output from the media controller is a hot address, and to adjust a length of the list.

Abstract: A semiconductor device may include a media controller configured to output a write requested address when a write request to a nonvolatile memory device is provided from a host; and a cold address manager. The cold address manager may include a stack storing meta data for the write requested address, region information storage configured to manage addresses of the nonvolatile memory device with regions such that length of a region of the regions may vary after a predetermined period, a cold address detector configured to update the stack and the region information storage after the predetermined period and to detect whether an address of the nonvolatile memory device is a cold address, the cold address having write requests performed at less than a predetermined level.

Abstract: A semiconductor device may include a media controller configured to output an address in response to receiving a write request for writing to a nonvolatile memory. The semiconductor device may also include a hot address detector. The hot address detector is configured to store a list including the address output from the media controller and including meta data related to the address, to update the meta data according to the address output from the media controller, to determine whether the address output from the media controller is a hot address, and to adjust a length of the list.