Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.

Abstract: A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.

Abstract: A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.

Abstract: A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

Abstract: A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

Abstract: A memory device, a host device and a memory system are provided. The memory device may include a plurality of storage units configured to store data, and at least one device controller configured to, receive a read command from at least one host device and to read data stored in the plurality of storage units in response to the read command, the at least one host device including at least one host memory including a plurality of HPB (high performance boosting) entry storage regions, and provide the at least one host device with a response command, the response command indicating an activation or deactivation of the plurality of HPB entry storage regions, the response command including HPB entry type information which indicates a HPB entry type of the HPB entry storage region.

Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.

Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.

Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.

Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit, can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.

Abstract: A method of operating a storage device includes receiving, at the storage device, a meta information transfer command based on a data read request. The meta information transfer command is received from a host device. The method further includes receiving, at the storage device, a data read command corresponding to the data read request and the meta information transfer command. The data read command is received from the host device. The method further includes receiving, at the storage device, a plurality of meta data corresponding to the data read request and the meta information transfer command. The plurality of meta data is received from the host device. The method further includes performing a data read operation, at the storage device, based on the data read command and the plurality of meta data.

Abstract: A storage device includes a descramble module configured to descramble at least a portion of a read command, which includes logical block address (LBA) information and first meta information, into first signature information and first physical address (PA) information, for accessing a flash memory. A compare module is provided, which is configured to compare the first signature information against stored signature information to thereby determine an equivalency or discrepancy therebetween. An access module is provided, which is configured to use the first PA information to access a data region of the flash memory, upon determination of the equivalency by said compare module.

Abstract: Provided is a semiconductor device and a semiconductor system. A semiconductor device can include a command priority policy manager circuit which generates command priority policy information including a command priority compliance policy for a command directed to a device. A host interface circuit, can be coupled to the command priority policy manager circuit to receive the command priority policy information from the command priority policy manager circuit, where the host interface circuit operable to transmit the command priority policy information via an electrical interface to the device.