Abstract: Disclosed are nonvolatile memory devices and methods of fabricating the same. A nonvolatile memory device can include a field isolation film configured to define active regions in a substrate and a wordline configured to intersect the active regions. Devices can also include source and drain regions formed in each of the active regions at both sides of the wordline and a source line configured to extend along the wordline under the source region. Devices can further include a join region configured to connect the source region with the source line.

Abstract: A semiconductor device includes a plurality of source regions and drain regions disposed on a semiconductor substrate. The semiconductor device also includes a plurality of word lines disposed on the semiconductor substrate between the source regions and the drain regions. The semiconductor device also includes a conductive line disposed on the semiconductor substrate parallel to the word lines. The semiconductor device also includes a plurality of bit lines connected to the drain regions and crossing over the word lines. The semiconductor device also includes a plurality of source strapping lines crossing over the plurality of word lines, the plurality of source strapping lines being connected to at least one of the plurality of source regions and the conductive line. The semiconductor device also includes a ground line connected to the conductive line.

Abstract: A semiconductor device comprising a trench device isolation layer and a method for fabricating the semiconductor device are disclosed. The method comprises forming a plurality of first trenches on a first region of a semiconductor substrate, filling the first trenches with a first insulation material to form first device isolation layers, forming a plurality of second trenches on a second region of the semiconductor substrate, and filling the second trenches with a second insulation material different from the first insulation material to form second device isolation layers, wherein the first trenches and the second trenches are formed using different respective processes.

Abstract: A method of fabricating a semiconductor device includes forming an active region including opposing sidewalls and a surface therebetween protruding from a substrate. A protective insulating layer is formed on the sidewalls of the active region, and extends away from the substrate to beyond the surface of the active region. A device isolation layer is also formed on the opposing sidewalls of the active region, and extends along the protective insulating layer to beyond the surface of the active region. As such, the protective insulating layer may protect portions of the device isolation layer extending therealong during subsequent fabrication processes. Related devices are also discussed.

Abstract: A semiconductor device is formed by providing a substrate. A trench is formed in the substrate. Beveled surfaces are formed at upper portions of sidewalls of the trench opposite a bottom surface of the trench, respectively. An oxide layer is formed in the trench such that the oxide layer is thicker on the beveled surfaces of the trench than on other surfaces of the trench.

Abstract: Methods of fabricating integrated circuit devices are provided. The method includes forming a buried diffusion layer in a source active region. A word line pattern is formed crossing over parallel cell active regions and the source active region. The word line pattern has parallel sidewalls such that the word line pattern forms a substantially straight line pattern on an integrated circuit substrate. A plurality of bit line contact plugs and at least one common source contact plug are formed in an insulating layer on the integrated circuit substrate. The bit line contact plugs and the common source contact plug are electrically coupled to the buried diffusion layer and disposed in a line on the integrated circuit substrate that is substantially parallel to the word line pattern. Related integrated circuit devices are also provided.

Abstract: Disclosed are a non-volatile memory device to protect a floating gate from charge loss and a method for forming the same. At least a pair of floating gate lines are formed on a semiconductor substrate. A portion of the substrate between the floating gate lines is etched to form a trench therein. A gap-fill dielectric layer is formed in the trench and also in the gap between the pair of floating gate lines. The gap-fill dielectric layer is implanted with impurities so that positive mobile ions that may permeate the floating gate through the gap-fill dielectric layer can be trapped in the gap-fill dielectric layer.

Abstract: Disclosed are a non-volatile memory device to protect a floating gate from charge loss and a method for forming the same. At least a pair of floating gate lines are formed on a semiconductor substrate. A portion of the substrate between the floating gate lines is etched to form a trench therein. A gap-fill dielectric layer is formed in the trench and also in the gap between the pair of floating gate lines. The gap-fill dielectric layer is implanted with impurities so that positive mobile ions that may permeate the floating gate through the gap-fill dielectric layer can be trapped in the gap-fill dielectric layer.