Patents by Inventor Wook JUNG

Wook JUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12363900
    Abstract: A three-dimensional (3D) semiconductor device includes a plurality of stack structures, a plurality of channel plugs, a slit structure and a plurality of dummy channel plugs. The stack structures include at least two conductive layers and at least two insulation layers, each being alternately stacked. The channel plugs are vertically formed through the stack structure. The slit structure is arranged at one side of the stack structure. The plurality of dummy channel plugs is arranged in the stack structures to be adjacent to the slit structure. Each of the channel plugs includes a channel insulation layer and a channel layer. Each of the dummy channel plugs includes at least one of the channel insulation layer, the channel layer, and a material of the plurality of conductive layers.
    Type: Grant
    Filed: October 25, 2022
    Date of Patent: July 15, 2025
    Assignee: SK hynix Inc.
    Inventor: Sung Wook Jung
  • Patent number: 12362147
    Abstract: An exemplary embodiment of the present invention provided an apparatus for treating a substrate. The apparatus for treating the substrate includes a process chamber having a treating space therein, a support unit for supporting the substrate in the treating space, gas supply unit for supplying treating gas to the treating space, and a microwave application unit for applying microwaves to the treating gas to generate plasma, wherein the microwave application unit includes a transmission plate disposed above the support unit to radiate the microwaves to the treating space, a first waveguide disposed above the transmission plate, and a first power supply for applying the microwaves to the first waveguide, wherein the first waveguide is provided in a ring shape.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: July 15, 2025
    Assignees: SEMES CO., LTD, PUSAN NATIONAL UNIVERSITY INDUSTRY-UNIVERSITY COOPERATION FOUNDATION
    Inventors: Sang Jeong Lee, Yoon Seok Choi, Sun Wook Jung, Ho-Jun Lee, Sang Woo Kim
  • Patent number: 12341028
    Abstract: An apparatus for processing a substrate includes a first bowl and a processing space therein; a first support portion disposed in the processing space and configured to support the substrate in a first support position; a second bowl disposed to move in a first direction in the processing space; a second support portion configured to move upwardly and downwardly with respect to the first support portion to support the substrate between the second support position disposed above the first support position and the third support position, and to move in the first direction; and a cleaning unit including a first cleaning portion disposed below the substrate toward a rear surface of the substrate in the first support position and a second cleaning portion disposed below the substrate and opposing a rear surface of the substrate between the second support position and the third support position.
    Type: Grant
    Filed: September 13, 2023
    Date of Patent: June 24, 2025
    Assignee: SEMES CO., LTD.
    Inventors: Sun Wook Jung, Ha Neul Yoo, Woo Ram Lee, Young Jun Son
  • Publication number: 20250201531
    Abstract: A heating device capable of uniformly maintaining a surface temperature of each zone of a substrate and a substrate treating apparatus including the same are provided. The substrate treating apparatus comprises a chamber housing providing a space in which a substrate is treated; a substrate support unit supporting the substrate inside the chamber housing; a showerhead unit providing a process gas into the chamber housing; a plasma generating unit generating plasma for treating the substrate inside the chamber housing by using the process gas; and a heating device heating the substrate by using a plurality of electromagnetic waves, wherein the plurality of electromagnetic waves are different from each other in at least one component of power, frequency or phase.
    Type: Application
    Filed: November 8, 2024
    Publication date: June 19, 2025
    Applicant: SEMES CO., LTD.
    Inventors: Chan Young CHOI, Sun Wook JUNG, In Ho KIM, Cheng Bin CUI, Hyung Bin IM
  • Publication number: 20250169075
    Abstract: A semiconductor memory device includes an electrode structure, a plurality of channel posts, and at least one gate separation layer. The electrode structure includes insulating interlayers and gate conductive layers which are alternately stacked. The channel posts are formed through the electrode structure. The gate separation layer is formed between the channel posts. The gate separation layer separates an uppermost gate conductive layer among the gate conductive layers. Each channel post among the channel posts adjacent to the gate separation layer has a gibbous moon shape in a planar view. The semiconductor memory device further includes a slit structure arranged at both sides of the gate separation layer. The slit structure is formed through the electrode structure. Each channel post among the channel posts adjacent to the slit structure has a gibbous moon shape in the planar view.
    Type: Application
    Filed: January 21, 2025
    Publication date: May 22, 2025
    Applicant: SK hynix Inc.
    Inventor: Sung Wook JUNG
  • Publication number: 20250151270
    Abstract: There is provided a semiconductor memory device and a method of manufacturing the same. The semiconductor memory device includes a first gate stacked body including a first channel hole, a second gate stacked body overlapping the first gate stacked body and including a second channel hole, a first memory layer extending along an inner wall of the first channel hole, a second memory layer extending along an inner wall of the second channel hole and including an end protruding into the first channel hole.
    Type: Application
    Filed: March 29, 2024
    Publication date: May 8, 2025
    Applicant: SK hynix Inc.
    Inventor: Sung Wook JUNG
  • Publication number: 20250134671
    Abstract: A glenoid baseplate and, more specifically, to a glenoid baseplate of an artificial shoulder joint, includes: a base which is mounted on the glenoid fossa of the scapula and has a first surface; an augment disposed on the first surface; and a stem extended from the first surface while having a center axis, wherein one surface of the augment forms a contact surface with the first surface, at least a portion of the contact surface forms a predetermined angle, that is not a right angle, with respect to the center axis of the stem, and the augment includes a first wedge having a second surface extended from a first boundary and a second wedge having a third surface bent and extended from the second surface, and thus the present invention compensates for bone defects, minimizes bone cutting, and has a simple shape so as to facilitate manufacturing.
    Type: Application
    Filed: October 17, 2022
    Publication date: May 1, 2025
    Inventors: Jung-Sung Kim, Jae-Won Kim, Sung-Wook Jung, Sang-Kil Lee, Yeon-Beom Heo
  • Publication number: 20250125256
    Abstract: A semiconductor package includes a first substrate that includes a first side and a second side opposite to each other; a semiconductor chip on the second side of the first substrate, and includes a third side and a fourth side opposite to each other; a second substrate between the second side of the first substrate and the third side of the semiconductor chip, and includes a fifth side and a sixth side opposite to each other; a first connecting structure electrically connecting the first substrate and the second substrate, between the first substrate and the second substrate; a second connecting structure electrically connecting the second substrate and the semiconductor chip, between the second substrate and the semiconductor chip; and a coil structure that includes a plurality of conductive layers, and is placed in at least one of the first substrate, the second substrate, and the semiconductor chip.
    Type: Application
    Filed: September 16, 2024
    Publication date: April 17, 2025
    Inventors: Jae Sup Lee, Sol Hee In, Do Hyung Kim, Byung Wook Jung
  • Patent number: 12279048
    Abstract: According to an embodiment of the present inventive concept, an image sensor includes a sensor including a plurality of pixels and configured to capture incident light and generate raw image data; a pre-processing processor configured to generate first image data by applying a first function to the raw image data; an image processor configured to receive the first image data and generate second image data using a machine learning model; and a post-processing processor configured to generate third image data by applying a second function to the second image data, wherein the first function is a non-linear function.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: April 15, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hun Soo Lee, Byung Wook Jung
  • Publication number: 20250115035
    Abstract: A polyester multi-layer film of the present invention comprises: a substrate layer comprising polyester; and a skin layer located on at least one surface of the substrate layer, wherein the polyester multi-layer film suppresses generation of oligomers in the film and migration to the surface even in a high-temperature treatment process by satisfying a predetermined correlation between the concentration of cyclic oligomers in the film and a haze value before and after heat treatment, thereby maintaining transparency and visibility of the film in the long term.
    Type: Application
    Filed: March 22, 2023
    Publication date: April 10, 2025
    Applicant: TORAY ADVANCED MATERIALS KOREA INC.
    Inventors: Kil Joong KIM, Sang Wook JUNG, Seong Yong PARK, Kyu Suk LEE
  • Publication number: 20250107084
    Abstract: The present technology relates to a semiconductor device, a method of manufacturing the same, and a method of operating the same. The semiconductor device includes a gate stack including first interlayer insulating layers and word line stack layers alternately stacked, a vertical channel structure extending in a vertical direction in the gate stack, and memory structures interposed between the word line stack layers and the vertical channel structure, each of the word line stack layers includes an even conductive layer, a second interlayer insulating layer, and an odd conductive layer sequentially stacked, and a thickness of any one of the first interlayer insulating layers is greater than a thickness of any one of the second interlayer insulating layers.
    Type: Application
    Filed: February 29, 2024
    Publication date: March 27, 2025
    Applicant: SK hynix Inc.
    Inventor: Sung Wook JUNG
  • Patent number: 12259545
    Abstract: An embodiment of the present invention relates to an optical apparatus comprising: a first main body including first cover glass; a second main body including second cover glass and foldably connected to the first main body; a first optical module arranged in the first main body; and a second optical module which is arranged in the second main body and which overlaps with the first optical module in the optical axis direction when the first cover glass and the second cover glass are facing each other.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: March 25, 2025
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jae Wook Jung, In Kyu Lee, Woo Jin Choi
  • Publication number: 20250090703
    Abstract: A lighting device including at least one first light source configured to emit a visible light through a first light emitting surface, at least one second light source spaced apart from the first light source and configured to emit light having a wavelength for sterilization through a second light emitting surface, and a housing having a bottom portion, on which the first and second light sources are disposed. The housing can include at least one sidewall portion connected to the bottom portion to enclose the first light source and the second light source in one common area, in which the first and second light emitting surfaces face substantially the same direction, and both the first light emitting surface and the second light emitting surface can be disposed at a different elevation from the bottom portion of the housing.
    Type: Application
    Filed: December 5, 2024
    Publication date: March 20, 2025
    Inventors: Jae Young CHOI, Kyu Won HAN, Seong Tae JANG, Sang Wook JUNG, Woong Ki JEONG
  • Patent number: 12255050
    Abstract: The inventive concept provides an antenna member. In an embodiment, the antenna member includes a first coil and a second coil which have a rotational symmetry to each other, and wherein the first coil includes a first supply terminal applied with a current and a first ground terminal connected to the ground, the second coil includes a second supply terminal applied with the current and a second ground terminal connected to the ground, and wherein the first coil and the second coil each include a first portion having an arc-shape and a second portion having an arc-shape which as a whole form one winding, and when seen from a side, the second portion has a relatively lower height than the first portion, and the second portion of the second coil is positioned below the first portion of the first coil, and the second portion of the first coil is positioned below the first portion of the second coil.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: March 18, 2025
    Assignee: Semes Co., Ltd.
    Inventors: Yoon Seok Choi, Yun Sang Kim, Sun Wook Jung
  • Publication number: 20250081466
    Abstract: Provided herein are a semiconductor memory device and a method of manufacturing the semiconductor memory device. The semiconductor memory device includes a transistor, a cell array structure, a molded insulating structure including a first area disposed between the transistor and the cell array structure and overlapping with the transistor and a second area extending sideways from the first area, a pass gate disposed in the second area of the molded insulating structure, an active pillar penetrating the pass gate, and a pass gate insulating layer disposed between the active pillar and the pass gate.
    Type: Application
    Filed: February 6, 2024
    Publication date: March 6, 2025
    Applicant: SK hynix Inc.
    Inventor: Sung Wook JUNG
  • Publication number: 20250072000
    Abstract: There is provided a semiconductor memory device. The semiconductor memory device includes a first peripheral circuit structure, a cell array structure, a mold insulating structure disposed between the first peripheral circuit structure and the cell array structure, and a second peripheral circuit structure disposed in the mold insulating structure and including a pass transistor.
    Type: Application
    Filed: February 7, 2024
    Publication date: February 27, 2025
    Applicant: SK hynix Inc.
    Inventor: Sung Wook JUNG
  • Publication number: 20250060564
    Abstract: A camera module disclosed in an embodiment of the invention includes a lens barrel having a through hole therein; and an optical system disposed in the through hole of the lens barrel and having a plurality of lenses which an optical axis is aligned from an object side toward a sensor side, wherein a sensor-side lens closest to an image sensor among the plurality of lenses includes an object-side surface and a sensor-side surface, the sensor-side lens has a length in a first direction orthogonal to the optical axis longer than a length in a second direction, the sensor-side lens includes an outer protrusion protruding on one side in the second direction, and the sensor-side surface of the sensor-side lens may have an asymmetrical shape in a shape of a lens surface from the optical axis to an end of an effective region in the first direction and a lens surface from the optical axis to an end of an effective region in the second direction.
    Type: Application
    Filed: December 21, 2022
    Publication date: February 20, 2025
    Inventor: Jae Wook JUNG
  • Publication number: 20250062643
    Abstract: The present disclosure relates to power receiving devices and methods. An example power receiving device comprises an antenna cell array configured to receive a radio frequency (RF) signal from a transmission device, where the antenna cell array includes a first antenna cell and a second antenna cell, a first rectifier connected to the first antenna cell and having first maximum rectification efficiency when an input signal of the first rectifier has a first power value, a second rectifier connected to the second antenna cell and having second maximum rectification efficiency when an input signal of the second rectifier has a second power value different from the first power value, a first voltage converter configured to perform a first conversion of an output of the first rectifier, and a second voltage converter configured to perform a second conversion of an output of the second rectifier.
    Type: Application
    Filed: April 30, 2024
    Publication date: February 20, 2025
    Inventors: Sol Hee In, Do Hyung Kim, Jae Sup Lee, Byung Wook Jung
  • Patent number: 12228861
    Abstract: An apparatus for treating a substrate includes a treating vessel having an inner space, a support unit that supports and rotates the substrate in the inner space, and an exhaust unit that releases an air flow in the inner space. The exhaust unit includes an air-flow guide duct into which the air flow is introduced in a tangential direction with respect to a rotating direction of the substrate supported on the support unit.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: February 18, 2025
    Assignee: SEMES Co., Ltd.
    Inventors: Ki Sang Eum, Jin Ho Choi, Sun Wook Jung, Byoung Doo Choi, Hee Man Ahn, Si Eun Kim
  • Patent number: 12225728
    Abstract: A semiconductor memory device includes an electrode structure, a plurality of channel posts, and at least one gate separation layer. The electrode structure includes insulating interlayers and gate conductive layers which are alternately stacked. The channel posts are formed through the electrode structure. The gate separation layer is formed between the channel posts. The gate separation layer separates an uppermost gate conductive layer among the gate conductive layers. Each channel post among the channel posts adjacent to the gate separation layer has a gibbous moon shape in a planar view. The semiconductor memory device further includes a slit structure arranged at both sides of the gate separation layer. The slit structure is formed through the electrode structure. Each channel post among the channel posts adjacent to the slit structure has a gibbous moon shape in the planar view.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: February 11, 2025
    Assignee: SK hynix Inc.
    Inventor: Sung Wook Jung