Patents by Inventor Woon-Seng Choong

Woon-Seng Choong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240125948
    Abstract: A single photon radiation detector is designed for a particular radiation source fluence, such that an incident radiation photon strikes a scintillator monolith, creating scintillation photons, which are amplified by appropriately sized channels of photomultipliers optically coupled to the scintillator monolith. The photomultiplier output is electronically shaped into a corresponding stream of scintillation pulses (otherwise referred to as scintillation photons) that pass through a comparator to produce a bitstream of the detected scintillation photons, which is sampled into a field programmable gate array (FPGA) acting as a giga-sample transceiver to produce time-to-digital conversions, capable of producing an output data stream of 10's-of-giga-samples per second or more. Appropriate design ensures sparsity of scintillation photon arrival, so that each photon in the bitstream corresponds to a single incident scintillation photon.
    Type: Application
    Filed: October 12, 2023
    Publication date: April 18, 2024
    Applicants: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA, National Technology & Engineering Solutions of Sandia, LLC
    Inventors: Joshua W. Cates, Woon-Seng Choong, Erik Brubaker
  • Patent number: 8729654
    Abstract: This disclosure provides systems, methods, and apparatus related to semiconductor photomultipliers. In one aspect, a device includes a p-type semiconductor substrate, the p-type semiconductor substrate having a first side and a second side, the first side of the p-type semiconductor substrate defining a recess, and the second side of the p-type semiconductor substrate being doped with n-type ions. A conductive material is disposed in the recess. A p-type epitaxial layer is disposed on the second side of the p-type semiconductor substrate. The p-type epitaxial layer includes a first region proximate the p-type semiconductor substrate, the first region being implanted with p-type ions at a higher doping level than the p-type epitaxial layer, and a second region disposed on the first region, the second region being doped with p-type ions at a higher doping level than the first region.
    Type: Grant
    Filed: October 15, 2012
    Date of Patent: May 20, 2014
    Assignee: The Regents of the University of California
    Inventors: Woon-Seng Choong, Stephen E. Holland