Abstract: Disclosed is a wireless communication system, specifically, an apparatus and method for configuring a primary cell carrier/secondary cell carrier (PCC/SCC) prioritization only based on extremely partial channel state information in a wireless communication system. Specifically, a method of operating a user equipment (UE) in a wireless communication system includes: transmitting a sounding reference signal (SRS) or channel state information (CSI) to a base station; receiving a signal from the base station on the basis of the SRS or the CSI; and estimating a number of multi-paths using a neural network for the received signal, wherein the estimating of the number of multi-paths includes: re-shaping the received signal; extracting a singular value of the reshaped signal; and estimating the number of multi-paths based on the extracted singular value.

Abstract: A display device and a method of fabricating a display device are provided. The display device includes a substrate comprising a contact area and a line area, a first electrode that extends in a first direction on the substrate, a first electrode pattern that extends in the first direction and is spaced apart from the first electrode on the substrate, a second electrode that extends in the first direction and is between the first electrode and the first electrode pattern on the substrate, a second electrode pattern that extends in the first direction and is between the first electrode and the second electrode on the substrate, and a first light-emitting element between the first electrode and the second electrode pattern in the contact area.

Abstract: The present invention relates to a system and method for managing Compact Component Interconnect (CPCI) buses in a multi-processing system. More particularly, the present invention improves performance and reliability of boards or systems using CPCI buses as the basic buses, by enabling all slots on a CPCI bus to function as system slots and thus obtaining the effect of parallel processing. The present invention makes it possible for all the slots on the CPCI bus of a board or system, which uses the CPCI buses as basic buses, to function as system slots. Thus, several boards of one and the same function may be applied to all the slots. As a result, the present invention improves performance through the effect of parallel processing effect may also improve the reliability through the flexible operation of the system slot over the related art.

Abstract: The present invention relates to a system and method for managing Compact Component Interconnect (CPCI) buses in a multi-processing system. More particularly, the present invention improves performance and reliability of boards or systems using CPCI buses as the basic buses, by enabling all slots on a CPCI bus to function as system slots and thus obtaining the effect of parallel processing. The present invention makes it possible for all the slots on the CPCI bus of a board or system, which uses the CPCI buses as basic buses, to function as system slots. Thus, several boards of one and the same function may be applied to all the slots. As a result, the present invention improves performance through the effect of parallel processing effect may also improve the reliability through the flexible operation of the system slot over the related art.