Patents by Inventor Woopoung Kim
Woopoung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8692573Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: GrantFiled: December 9, 2011Date of Patent: April 8, 2014Assignee: Rambus Inc.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Patent number: 8588280Abstract: Embodiments of a system that communicates bidirectional data between two devices via shared links is described. In this system, data is transmitted on the shared links by one of the devices using single-ended drivers, and corresponding symbols are received on the shared links by the other device using differential comparison circuits. The data may be encoded as a series of parallel codewords prior to transmission. Each shared link may communicate a respective symbol in each codeword, which can have one of two possible logical values (e.g., a logic 0 or a logic 1). The corresponding symbols received by the other device may comprise a parallel symbol set, and each of the differential comparison circuits may compare symbols received on pairs of the shared links. A decoder in the other device may decode a respective parallel symbol set from the outputs of the differential comparison circuits to recover the encoded data.Type: GrantFiled: December 19, 2008Date of Patent: November 19, 2013Assignee: Rambus Inc.Inventors: Kyung Suk Oh, John Wilson, Frederick A. Ware, WooPoung Kim, Jade M. Kizer, Brian S. Leibowitz, Lei Luo, John Cronan Eble
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Publication number: 20120081146Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: ApplicationFiled: December 9, 2011Publication date: April 5, 2012Applicant: RAMBUS INC.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Patent number: 8130010Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: GrantFiled: February 7, 2011Date of Patent: March 6, 2012Assignee: Rambus Inc.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Publication number: 20110128040Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: ApplicationFiled: February 7, 2011Publication date: June 2, 2011Applicant: RAMBUS INC.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Patent number: 7915912Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: GrantFiled: September 9, 2009Date of Patent: March 29, 2011Assignee: Rambus Inc.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Publication number: 20100309964Abstract: Embodiments of a system that communicates bidirectional data between two devices via shared links is described. In this system, data is transmitted on the shared links by one of the devices using single-ended drivers, and corresponding symbols are received on the shared links by the other device using differential comparison circuits. The data may be encoded as a series of parallel codewords prior to transmission. Each shared link may communicate a respective symbol in each codeword, which can have one of two possible logical values (e.g., a logic 0 or a logic 1). The corresponding symbols received by the other device may comprise a parallel symbol set, and each of the differential comparison circuits may compare symbols received on pairs of the shared links. A decoder in the other device may decode a respective parallel symbol set from the outputs of the differential comparison circuits to recover the encoded data.Type: ApplicationFiled: December 19, 2008Publication date: December 9, 2010Applicant: RAMBUS INC.Inventors: Kyung Suk Oh, John Wilson, Frederick Ware, WooPoung Kim, Jade M. Kizer, Brian S. Leibowitz, Lei Luo, John Cronan Eble
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Publication number: 20100073023Abstract: Embodiments of a memory controller are described. This memory controller communicates signals to a memory device via a signal line, which can be a data signal line or a command/address signal line. Termination of the signal line is divided between an external impedance outside of the memory controller and an internal impedance within the memory controller. The memory controller does not activate the external impedance prior to communicating the signals and, therefore, does not deactivate the external impedance after communicating the signals. The internal impedance of the memory controller can be enabled or disabled in order to reduce interface power consumption. Moreover, the internal impedance may be implemented using a passive component, an active component or both. For example, the internal impedance may include either or both an on-die termination and at least one driver.Type: ApplicationFiled: September 9, 2009Publication date: March 25, 2010Applicant: RAMBUS INC.Inventors: Kyung Suk Oh, Woopoung Kim, Huy M. Nguyen, Eugene C. Ho
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Publication number: 20020158305Abstract: Organic substrates having integrated components and systems and methods for designing and optimizing integrated components for substrates are provided. One embodiment is a computer program embodied in a computer-readable medium for optimizing the design of an integrated inductor in a substrate adapted for use in integrated circuits.Type: ApplicationFiled: November 26, 2001Publication date: October 31, 2002Inventors: Sidharth Dalmia, Sung Hwan Min, Seock Hee Lee, Venkatesh Sundaram, Farrokh Ayazi, George E. White, Madhavan Swaminathan, Woopoung Kim