Abstract: Disclosed is a semiconductor package including a package substrate, a semiconductor chip mounted on the package substrate, a connection solder pattern between the package substrate and the semiconductor chip, and a dummy bump between the package substrate and the semiconductor chip and spaced apart from the connection solder pattern. The connection solder pattern includes a first intermetallic compound layer, a connection solder layer, and a second intermetallic compound layer. The dummy bump includes a dummy pillar and a dummy solder pattern. A thickness of the dummy solder pattern is less than a thickness of the connection solder pattern. A melting point of the dummy solder pattern is greater than that of the connection solder layer.

Abstract: A semiconductor package includes: a lower substrate including a lower wiring layer; a semiconductor chip disposed on the lower substrate, the semiconductor chip including a first surface facing the lower substrate and a second surface opposite to the first surface; an upper substrate disposed on the lower substrate and the semiconductor chip, the upper substrate including a lower surface on which support members protruding toward the second surface of the semiconductor chip are disposed; a connection structure disposed between the lower substrate and the upper substrate; an encapsulant filling a space between the lower substrate and the upper substrate and encapsulating at least a portion of the semiconductor chip and the connection structure; and adhesive members disposed on the second surface of the semiconductor chip such as to correspond to the support members, respectively, the adhesive members disposed in contact with the second surface and the support members.

Abstract: A semiconductor package includes a lower substrate having a chip mounting region, an interconnection region surrounding the chip mounting region, and an outer region surrounding the interconnection region, and includes a lower wiring layer. A first solder resist pattern has first openings exposing bonding regions of the lower wiring layer. A semiconductor chip is on the chip mounting region and is electrically connected to the lower wiring layer. A second solder resist pattern is on the first solder resist pattern on the interconnection and outer regions and is spaced apart from the semiconductor chip, and includes second openings disposed on the first openings. An upper substrate covers the semiconductor chip, and includes an upper wiring layer. A vertical connection structure is on the interconnection region and electrically connects the upper and lower wiring layers. A solder resist spacer is on the second solder resist pattern on the outer region.

Abstract: Provided is a mounting substrate for a semiconductor package, including a substrate having an upper surface and a lower surface opposite to each other, the substrate including a plurality of insulation layers and wirings in the plurality of insulation layers, first substrate pads and second substrate pads on the upper surface in a chip mounting region of the mounting surface, heat absorbing pads on the upper surface in a peripheral region of the mounting surface adjacent to the chip mounting region, and connection lines in the substrate, the connection lines being configured to thermally couple the heat absorbing pads and the second substrate pads to each other.

Abstract: The present invention relates to a method for formation of a redistribution layer using photo-sintering and to the redistribution layer formed by the method. The method for forming a redistribution layer using photo-sintering includes printing, on a substrate, a liquid electrode pattern for a redistribution layer; coating a transparent polymer on the substrate and the pattern; photo-sintering the electrode pattern using photonic energy; and evaporating an organic substance contained in the liquid electrode pattern via the photo-sintering to remove the polymer on a top face of the electrode pattern to form a redistribution layer as the sintered electrode pattern.

Abstract: Disclosed are laser bonding apparatuses and methods, The laser bonding apparatus comprises a stage configured to receive a substrate, a laser device that may be disposed on the stage and is configured to irradiate a laser beam onto the substrate, a first rotation support disposed outside of the stage and is configured to drivee the laser device to rotate in an azimuthal angle direction, and a second rotation support configured to support the laser device and configured to drive the laser device to rotate in a polar angle direction intersecting the azimuthal angle direction.

Abstract: The present invention relates to a method for formation of a redistribution layer using photo-sintering and to the redistribution layer formed by the method. The method for forming a redistribution layer using photo-sintering includes printing, on a substrate, a liquid electrode pattern for a redistribution layer; coating a transparent polymer on the substrate and the pattern; photo-sintering the electrode pattern using photonic energy; and evaporating an organic substance contained in the liquid electrode pattern via the photo-sintering to remove the polymer on a top face of the electrode pattern to form a redistribution layer as the sintered electrode pattern.