Patents by Inventor Wooseok SEONG

Wooseok SEONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240119297
    Abstract: A processor-implemented method with checkpointing includes: performing an operation for learning of an artificial neural network (ANN) model; and performing a checkpointing to store information about a state of the ANN model, simultaneously with performing the operation for the learning of the ANN model.
    Type: Application
    Filed: February 3, 2023
    Publication date: April 11, 2024
    Applicants: SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
    Inventors: Junyeon LEE, Jin-soo KIM, Seongyeop JEONG, Uiseok SONG, Byungwoo BANG, Wooseok CHANG, Hun Seong CHOI
  • Publication number: 20240079378
    Abstract: A stacked IC package includes a first die including a first power transmission region, an adapter die stacked on the first die, a second die stacked on the adapter die and including a second power transmission region, and a first power transmission path electrically connected between the second power transmission region and the first power transmission region through the adapter die. The first power transmission path includes a first power transmission part penetrating a portion of the adapter die in a vertical direction from the first power transmission region, a second power transmission part including a connected part in a horizontal direction from the first power transmission part in the adapter die, and a third power transmission part connected to the second power transmission region in the vertical direction from the second power transmission part. A voltage conversion circuit is arranged on the first power transmission path.
    Type: Application
    Filed: March 15, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: HUN SEONG CHOI, WOOSEOK CHANG, JUNYEON LEE, MINKYU KIM, BYUNGWOO BANG, JIYE CHOI
  • Publication number: 20220358262
    Abstract: Provided is a processor configured to compute elements affecting an optimization matrix in connection with a first measurement, among elements of a Hessian matrix, instead of generating a whole Hessian matrix for a map point and a camera pose based on all measurements, and accumulate the computed elements over the optimization matrix used to perform optimization operations in relation to states of the map point and the camera pose.
    Type: Application
    Filed: October 27, 2021
    Publication date: November 10, 2022
    Applicants: SAMSUNG ELECTRONICS CO., LTD., University of Seoul Industry Cooperation Foundation
    Inventors: Myungjae JEON, Kichul KIM, Namseop KWON, Hongseok LEE, San KIM, Wooseok SEONG, Seongmin CHOI