Patents by Inventor Woo-sub Kim

Woo-sub Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit device having input/output electrostatic discharge protection cell equipped with electrostatic discharge protection element and power clamp
    Patent number: 7763941
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: July 27, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang
  • Integrated circuit device having input/output electrostatic discharge protection cell equipped with electrostatic discharge protection element and power clamp
    Publication number: 20080042206
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Application
    Filed: August 30, 2007
    Publication date: February 21, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-Pil Jang
  • Integrated circuit device having input/output electrostatic discharge protection cell equipped with electrostatic discharge protection element and power clamp
    Patent number: 7280329
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: October 9, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang
  • Integrated circuit device having input/output electrostatic discharge protection cell equipment with electrostatic discharge protection element and power clamp
    Publication number: 20050045955
    Abstract: There is provided an integrated circuit device having an input/output electrostatic discharge (I/O ESD) protection cell. The integrated circuit device includes an I/O ESD protection cell comprising a VDD ESD protection element connected between an I/O pad and a VDD line, a ground voltage (VSS) ESD protection element connected between the I/O pad and a VSS line, and a power clamp element connected between the VDD line and the VSS line, and wherein the VDD ESD protection element, the power clamp element, and the VSS ESD protection element in the I/O ESD protection cell are adjacent to each other so they can be connected in a straight line or are arranged to partially overlap.
    Type: Application
    Filed: August 27, 2004
    Publication date: March 3, 2005
    Inventors: Han-gu Kim, Ki-tae Lee, Jae-hyok Ko, Woo-sub Kim, Sung-pil Jang