Abstract: A vertical semiconductor device including a plurality of vertical memory cells on an upper surface of a first substrate, an adhesive layer on a lower surface of the first substrate that is opposite to the upper surface of the first substrate, a second substrate having first peripheral circuits thereon, a lower insulating interlayer on the second substrate, and a plurality of wiring structures electrically connecting the vertical memory cells and the first peripheral circuits. A lower surface of the adhesive layer and an upper surface of the lower insulating interlayer may be in contact with each other.

Abstract: A vertical semiconductor device including a plurality of vertical memory cells on an upper surface of a first substrate, an adhesive layer on a lower surface of the first substrate that is opposite to the upper surface of the first substrate, a second substrate having first peripheral circuits thereon, a lower insulating interlayer on the second substrate, and a plurality of wiring structures electrically connecting the vertical memory cells and the first peripheral circuits. A lower surface of the adhesive layer and an upper surface of the lower insulating interlayer may be in contact with each other.

Abstract: Semiconductor devices are provided. A semiconductor device includes first and second stacks of electrodes. Moreover, the semiconductor device includes first and second connection lines that connect the first and second stacks of electrodes. In some embodiments, the first connection lines have a first length and the second connection lines have a second length that is longer than the first length of the first connection lines. In some embodiments, the first connection lines connect inner portions of the first stack of electrodes to inner portions of the second stack of electrodes. In some embodiments, the second connection lines connect outer portions of the first stack of electrodes to outer portions of the second stack of electrodes.

Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.

Abstract: Semiconductor devices are provided. A semiconductor device includes first and second stacks of electrodes. Moreover, the semiconductor device includes first and second connection lines that connect the first and second stacks of electrodes. In some embodiments, the first connection lines have a first length and the second connection lines have a second length that is longer than the first length of the first connection lines. In some embodiments, the first connection lines connect inner portions of the first stack of electrodes to inner portions of the second stack of electrodes. In some embodiments, the second connection lines connect outer portions of the first stack of electrodes to outer portions of the second stack of electrodes.

Abstract: Semiconductor devices are provided. A semiconductor device includes first and second stacks of electrodes. Moreover, the semiconductor device includes first and second connection lines that connect the first and second stacks of electrodes. In some embodiments, the first connection lines have a first length and the second connection lines have a second length that is longer than the first length of the first connection lines. In some embodiments, the first connection lines connect inner portions of the first stack of electrodes to inner portions of the second stack of electrodes. In some embodiments, the second connection lines connect outer portions of the first stack of electrodes to outer portions of the second stack of electrodes.

Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.

Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.

Abstract: Semiconductor devices are provided. A semiconductor device includes first and second stacks of electrodes. Moreover, the semiconductor device includes first and second connection lines that connect the first and second stacks of electrodes. In some embodiments, the first connection lines have a first length and the second connection lines have a second length that is longer than the first length of the first connection lines. In some embodiments, the first connection lines connect inner portions of the first stack of electrodes to inner portions of the second stack of electrodes. In some embodiments, the second connection lines connect outer portions of the first stack of electrodes to outer portions of the second stack of electrodes.

Abstract: A semiconductor device includes a plurality of line patterns formed apart from one another on a substrate, the plurality of line patterns having a first width and extending parallel to one another in a first direction. A first line pattern of the plurality of line patterns may include a wider portion having a second width in a second direction perpendicular to the first direction that is greater than the first width. One or more second line patterns may be located adjacent to the first line pattern and include a conformal portion conformally formed about the wider portion of the first line pattern. One or more third line patterns may be located adjacent to the second line pattern and include an end portion near the conformal portion of the one or more second line pattern.

Abstract: A semiconductor device including a plug; a lower insulating film surrounding a lower sidewall of the plug; a spacer surrounding an upper sidewall of the plug; and a first interconnection line on the plug, the lower insulating film, and the spacer, the first interconnection line being in contact with an upper surface of the plug, wherein an upper portion of the spacer protrudes higher than the upper surface of the plug.

Abstract: The present invention relates to a drug releasing membrane for stent and a drug releasing stent for intraluminal expansion comprising the same. The drug releasing membrane according to the present invention has a two layer structure consisting of an inner layer M1 and an outer layer M2, the inner layer M is a thermosetting resin layer, and said outer layer M2 is a thermoplastic resin layer containing drug particles. In addition, the drug releasing stent for intraluminal expansion according to the present invention has a structure in which said drug releasing membrane M is inserted in a cylindrical stent body S woven with shape memory alloy wire. The present invention has excellent physical properties in spite of contact with bile during use, and is also excellent in drug therapeutic effect since drug is released only in one direction toward the skin.

Abstract: The present invention relates to a stent for intraluminal expansion. The stent for intraluminal expansion comprises an inner stent A, an outer stent B and fixing threads C for fixing these stents as one unit. The outer stent B is inserted over the inner stent A in such a way that the space portions of the inner stent A and the space portions of the outer stent B are alternated with each other, so the outer surface of the inner stent and the inner surface of the outer stent are in close contact with each other, and both ends of the outer stent and inner stent are fixed as one unit by fixing threads C.