Abstract: A circuit for deriving a synchronizing signal contained in an incoming video signal, having a pulse generator generating the synchronizing signal when the incoming signal reaches a threshold value. This treshold value corresponds to a level located between the peak and reference levels of the incoming signal and is determined with the aid of a keyed integrator, which integrates the video signal during a period of time which at least partly coincides with the occurrence of an incoming line synchronizing pulse and during a period of time after this occurrence, but before the end of the line blanking interval. In the synchronized state of the line synchronizing circuit, the required keying pulses are generated by this line synchronizing circuit; in the non-synchronized state the keying pulses are derived from the delayed output signal of the pulse generator. (FIG. 2).

Abstract: A synchronizing circuit and a sawtooth generator for the field deflection in a picture display device in which the sawtooth-shaped signal generated by the sawtooth generator has a retrace whose duration is switchable between a short and a longer duration. In a first use this switchover is used for eliminating the interlacing upon reception of interlaced signals, while the difference between the two durations is equal to half a line period and the switchover is effected at the picture frequency. In a second use a memory circuit is used which is an auxiliary circuit for the field synchronization, in which the shorter duration of the retrace period is switched over to in the absence of a plurality of successive incoming field synchronizing pulses, which plurality is not higher than a predetermined value.

Abstract: A circuit for generating a triangular voltage (V.sub.c) across a capacitor (C) having a charging current source (1, 2) and a discharging current source (3, 4) for the capacitor (C). A comparison stage (11, 12, 13, 14) compares the generated voltage (V.sub.c) with a first and a second reference voltage, respectively, from a voltage divider (17, 18, 19) and controls the generation of a setting and a resetting signal, respectively, at a bistable switching element (20, 21) when the value of the first and the second reference voltage, respectively, is reached. The bistable element (20, 21) controls a switch (7, 8) which determines charging or discharging, respectively, of the capacitor (C). The circuit is suitable for high repetition rates because of the fact that a buffer stage (28) is connected to the capacitor (C) for deriving, under the control of the capacitor voltage (V.sub.

Abstract: A synchronizing circuit arrangement for deriving and processing a synchronizing signal contained in an incoming video signal. The composite synchronizing signal is obtained by means of a comparator stage to which the video signal and a clipping level are applied, and is applied to a line synchronizing circuit. This line synchronizing circuit comprises a synchronization detector for detecting the synchronized state between the line synchronizing pulses obtained and the locally generated pulses of the line frequency. In the synchronized state the peak level detector, by means of which the clipping level is derived, is switched to operate as a mean-value detector which is operative during the occurrence of keying pulses of line frequency occurring during those periods when the video signal assumes a value corresponding with the peak level of the synchronizing pulses.

Abstract: In a class-B output amplifier having an npn-transistor the collector of which controls a cathode of a picture display tube via oppositely conducting parts of a diode and an emitter follower, respectively, a signal corresponding with the beam current through the relevant cathode is obtained from the collector circuit of an npn-transistor whose base-emitter path is arranged in parallel with the diode. The signal corresponding with the beam current can be used for controlling a background current and for limiting a beam current, respectively.

Abstract: In a television picture display device wherein a cathode of a picture display tube is driven by an emitter-follower and a control signal for a beam current reference level control circuit is obtained from the collector circuit of this emitter-follower, measures are taken to compensate for leakage currents from and to the cathode. To this end a blacker-than-black current compensation circuit is provided while furthermore it is ensured that the blacker-than-black curent can be processed by the beam current reference level control circuit.

Abstract: A coupling device for adaptation of I.sup.2 L transistors to a transistor operating with a higher bias current setting on a semiconductor body, said coupling device formed in one island from the combination of a current injector and a normally operated vertical transistor.

Abstract: A circuit measures the beam current of a cathode ray tube and derives a control signal from it to prevent overdriving and defocussing of the CRT. The circuit can measure both peak and average values and has an isolation circuit, such as an emitter follower, to prevent loading of the cathode circuit of the CRT.

Abstract: A film circuit which realizes a time constant the equivalent of a large RC time constant without the use of capacitors of comparatively large dimensions. The circuit includes a differential amplifier, to the first input of which an input signal is applied and at the second input of which an output signal is produced, in such a way that said output signal follows the d.c. level of the input signal, while rapid fluctuations of the input signal are not followed. The output signal is taken from a voltage divider which is included between the supply terminals and which comprises at least one temperature sensitive element which is in direct thermal contact with a heating resistance layer which is included in at least one of the outputs of the differential amplifier.