Patents by Inventor Wreeju Bhaumik
Wreeju Bhaumik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230152165Abstract: Systems, devices, and methods related to temperature sensors for electronic devices are provided. An example temperature sensor device includes analog temperature sensor circuitry to generate a plurality of voltages indicative of a temperature; an analog-to-digital converter (ADC) disposed downstream of the analog temperature sensing circuitry; switched-capacitor amplifier circuitry disposed before the ADC, the switched-capacitor amplifier circuitry comprising a single-ended amplifier to amplify the plurality of voltages with respect to a common voltage; a first switch coupled between the analog temperature sensor circuitry and the switched-capacitor amplifier circuitry to provide a sampling phase and an integration phase; and digital calculation circuitry to calculate a temperature value based on the plurality of amplified voltages.Type: ApplicationFiled: November 12, 2021Publication date: May 18, 2023Applicant: Analog Devices International Unlimited CompanyInventors: Gaurav SINGH, Wreeju BHAUMIK
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Patent number: 11632105Abstract: Improved overcurrent detection and mitigation systems, methods, and techniques for a BMS are described herein. A BMS monitor may detect an overcurrent using two different techniques. The first technique may detect an overcurrent based on average power over different, overlapping time periods. The second technique may detect an overcurrent based on determining a modeled junction temperature of a switching device.Type: GrantFiled: March 31, 2021Date of Patent: April 18, 2023Assignee: Analog Devices International Unlimited CompanyInventors: Gaurav Singh, Wreeju Bhaumik
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Publication number: 20220321114Abstract: Improved overcurrent detection and mitigation systems, methods, and techniques for a BMS are described herein. A BMS monitor may detect an overcurrent using two different techniques. The first technique may detect an overcurrent based on average power over different, overlapping time periods. The second technique may detect an overcurrent based on determining a modeled junction temperature of a switching device.Type: ApplicationFiled: March 31, 2021Publication date: October 6, 2022Inventors: Gaurav Singh, Wreeju Bhaumik
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Patent number: 11460814Abstract: TDCs for converting time periods to digital values are disclosed. An example TDC includes a ring oscillator and a residue generation circuit. Each stage of the residue generation circuit is configured to operate on outputs from two different stages of the ring oscillator. The TDC further includes a counter for counting the number of times that an output of one of the stages of the ring oscillator switches between being at a first signal level and being at a second signal level during a time period that is being converted to a digital value. The TDC also includes a combiner for generating the digital value by combining a value indicative of the number of times counted by the counter and an output of the residue generation circuit. Such a TDC may have relatively low area and low power consumption compared to the conventional TDC designs, while yielding sufficiently linear behavior.Type: GrantFiled: May 11, 2021Date of Patent: October 4, 2022Assignee: Analog Devices International Unlimited CompanyInventors: Wreeju Bhaumik, Batna Suryanarayana
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Patent number: 11271572Abstract: Embodiments may relate to techniques or circuitry for the control of a clock signal by a phase-locked loop (PLL) circuit. The technique may include the identification of a first parameter related to a gain of a digitally controlled oscillator (DCO) and a second parameter related to a resolution of a time-to-digital converter (TDC). The technique may then include the identification of a third parameter related to filter coefficients of a loop filter of the PLL circuit based on the first and second parameter. The circuit may then output a clock signal based on the first, second, and third parameters. Other embodiments may be described or claimed.Type: GrantFiled: April 29, 2020Date of Patent: March 8, 2022Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Wreeju Bhaumik, Batna Suryanarayana, Dheeraj Arimboor
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Publication number: 20220019177Abstract: TDCs for converting time periods to digital values are disclosed. An example TDC includes a ring oscillator and a residue generation circuit. Each stage of the residue generation circuit is configured to operate on outputs from two different stages of the ring oscillator. The TDC further includes a counter for counting the number of times that an output of one of the stages of the ring oscillator switches between being at a first signal level and being at a second signal level during a time period that is being converted to a digital value. The TDC also includes a combiner for generating the digital value by combining a value indicative of the number of times counted by the counter and an output of the residue generation circuit. Such a TDC may have relatively low area and low power consumption compared to the conventional TDC designs, while yielding sufficiently linear behavior.Type: ApplicationFiled: May 11, 2021Publication date: January 20, 2022Applicant: Analog Devices International Unlimited CompanyInventors: Wreeju BHAUMIK, Batna SURYANARAYANA
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Publication number: 20210344348Abstract: Embodiments may relate to techniques or circuitry for the control of a clock signal by a phase-locked loop (PLL) circuit. The technique may include the identification of a first parameter related to a gain of a digitally controlled oscillator (DCO) and a second parameter related to a resolution of a time-to-digital converter (TDC). The technique may then include the identification of a third parameter related to filter coefficients of a loop filter of the PLL circuit based on the first and second parameter. The circuit may then output a clock signal based on the first, second, and third parameters. Other embodiments may be described or claimed.Type: ApplicationFiled: April 29, 2020Publication date: November 4, 2021Applicant: Analog Devices International Unlimited CompanyInventors: Wreeju BHAUMIK, Batna SURYANARAYANA, Dheeraj ARIMBOOR
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Patent number: 11067954Abstract: TDCs for converting time periods to digital values are disclosed. An example TDC includes a ring oscillator and a residue generation circuit. Each stage of the residue generation circuit is configured to operate on outputs from two different stages of the ring oscillator. The TDC further includes a counter for counting the number of times that an output of one of the stages of the ring oscillator switches between being at a first signal level and being at a second signal level during a time period that is being converted to a digital value. The TDC also includes a combiner for generating the digital value by combining a value indicative of the number of times counted by the counter and an output of the residue generation circuit. Such a TDC may have relatively low area and low power consumption compared to the conventional TDC designs, while yielding sufficiently linear behavior.Type: GrantFiled: July 15, 2020Date of Patent: July 20, 2021Assignee: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANYInventors: Wreeju Bhaumik, Batna Suryanarayana
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Patent number: 8994426Abstract: In various embodiments, systems and methods for generating high-precision pulse-width modulation include a delay-locked loop comprising multiple delay units having time-variable delays, control logic for selecting a subset S of the multiple delay units to thereby generate a time-invariant shift amount having a precision finer than that of a system clock and circuitry for applying the shift amount to rising and falling edges of a pulse-width modulation waveform to thereby generate a high-precision pulse-width modulation waveform.Type: GrantFiled: August 31, 2012Date of Patent: March 31, 2015Assignee: Analog Devices, Inc.Inventors: Wreeju Bhaumik, Senthil Kumar Devandaya Gopalrao
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Publication number: 20140062551Abstract: In various embodiments, systems and methods for generating high-precision pulse-width modulation include a delay-locked loop comprising multiple delay units having time-variable delays, control logic for selecting a subset S of the multiple delay units to thereby generate a time-invariant shift amount having a precision finer than that of a system clock and circuitry for applying the shift amount to rising and falling edges of a pulse-width modulation waveform to thereby generate a high-precision pulse-width modulation waveform.Type: ApplicationFiled: August 31, 2012Publication date: March 6, 2014Inventors: Wreeju Bhaumik, Senthil Kumar Devandaya Gopalrao
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Patent number: 8258861Abstract: A system for reducing power consumption in a transistor-based system includes a measurement circuit and a comparator. The measurement circuit measures a delay of a transistor-based device and produces a control signal corresponding to the measured delay. The comparator compares the control signal to a predetermined threshold. Adjusting a power supply voltage of the transistor-based system based at least in part on a result of the comparison reduces the power consumed by the system.Type: GrantFiled: January 8, 2010Date of Patent: September 4, 2012Assignee: Analog Devices, Inc.Inventors: Wreeju Bhaumik, Ashok Balivada, Senthil Gopalrao
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Publication number: 20110169563Abstract: A system for reducing power consumption in a transistor-based system includes a measurement circuit and a comparator. The measurement circuit measures a delay of a transistor-based device and produces a control signal corresponding to the measured delay. The comparator compares the control signal to a predetermined threshold. Adjusting a power supply voltage of the transistor-based system based at least in part on a result of the comparison reduces the power consumed by the system.Type: ApplicationFiled: January 8, 2010Publication date: July 14, 2011Inventors: Wreeju Bhaumik, Ashok Balivada, Senthil Gopalrao