Abstract: A disclosed transistor structure includes a gate electrode, an active layer, a source electrode, a drain electrode, an insulating layer separating the gate electrode from the active layer, and a carrier modification device that reduces short channel effects by reducing carrier concentration variations in the active layer. The carrier modification device may include a capping layer in contact with the active layer that acts to increase a carrier concentration in the active layer. Alternatively, the carrier modification device may include a first injection layer in contact with the source electrode and the active layer separating the source electrode from the active layer, and a second injection layer in contact with the drain electrode and the active layer separating the drain electrode from the active layer. The first and second injection layers may act to reduce a carrier concentration within the active layer near the source electrode and the drain electrode.

Abstract: A semiconductor device includes a gate, a semiconductor structure, a gate insulating layer, a first source/drain feature and a second source/drain feature. The gate insulating layer is located between the gate and the semiconductor structure. The semiconductor structure includes at least one first metal oxide layer, a first oxide layer, and at least one second metal oxide layer. The first oxide layer is located between the first metal oxide layer and the second metal oxide layer. The first source/drain feature and the second source/drain feature are electrically connected with the semiconductor structure.

Abstract: Some embodiments relate to a thin film transistor comprising an active layer over a substrate. An insulator is stacked with the active layer. A gate electrode structure is stacked with the insulator and includes a gate material layer having a first work function and a first interfacial layer. The first interfacial layer is directly between the insulator and the gate material layer, wherein the gate electrode structure has a second work function that is different from the first work function.

Abstract: In this patent, a high energy and power density supercapacitor was invented. A coin cell with supercapacitor includes a spring lamination, a working electrode, a counter electrode, a separator, and an Organic electrolyte. The working and counter electrodes were Activated carbon/N-doping porous graphene/binder coated on Aluminum substrate. The separator was from Nippon Kodoshi Corporation. The Organic electrolyte was 1M TEABF4/PC. The method of producing N-doping porous graphene included the following steps: Step 1: Graphite oxide (GO) was transferred into the furnace. Step 2: Inject 50 c.c./min gas flow of Nitrous oxides for one hour. Step 3: Intensify 40 Celsius degrees/min to 900 Celsius degrees and after holding for one hour, lower the temperature naturally to the room temperature, it can be prepared into N-doping porous graphene. In this patent, the capacitance of the supercapacitor is 122 F/g and the power density is 31 kW/Kg.

Abstract: A high volumetric energy and power density supercapacitor is provided. This supercapacitor includes a coin cell, a spring lamination, a working electrode, a counter electrode, a separator, and an ionic liquid electrolyte. The working and counter electrodes are N—P doping porous graphene coated on Al substrate. The ionic liquid electrolyte is EMI-FSI. The method of producing N—P doping porous graphene includes following steps: S1: Graphite oxide is quickly transferred into the furnace, which had been held at 300° C. and the porous graphene can be produced. S2: The porous graphene and red phosphorus are put together in the evacuated tube furnace and heated to 700° C. for 1 hr. S3: Heated to 800° C. for 30 min in a mixed argon and ammoniac atmosphere and then the N—P doping porous graphene can be made. The capacitance of the supercapacitor is 105 F/g and the volumetric power density is 1.19 kW/L.

Abstract: In this patent, a high energy and power density supercapacitor was invented. A coin cell with supercapacitor includes a spring lamination, a working electrode, a counter electrode, a separator, and an Organic electrolyte. The working and counter electrodes were Activated carbon/N-doping porous graphene/binder coated on Aluminum substrate. The separator was from Nippon Kodoshi Corporation. The Organic electrolyte was 1M TEABF4/PC. The method of producing N-doping porous graphene included the following steps: Step 1: Graphite oxide (GO) was transferred into the furnace. Step 2: Inject 50 c.c./min gas flow of Nitrous oxides for one hour. Step 3: Intensify 40 Celsius degrees/min to 900 Celsius degrees and after holding for one hour, lower the temperature naturally to the room temperature, it can be prepared into N-doping porous graphene. In this patent, the capacitance of the supercapacitor is 122 F/g and the power density is 31 kW/Kg.

Abstract: A high volumetric energy and power density supercapacitor is provided. This supercapacitor includes a coin cell, a spring lamination, a working electrode, a counter electrode, a separator, and an ionic liquid electrolyte. The working and counter electrodes are N-P doping porous graphene coated on Al substrate. The ionic liquid electrolyte is EMI-FSI. The method of producing N-P doping porous graphene includes following steps: S1: Graphite oxide is quickly transferred into the furnace, which had been held at 300° C. and the porous graphene can be produced. S2: The porous graphene and red phosphorus are put together in the evacuated tube furnace and heated to 700° C. for 1 hr. S3: Heated to 800° C. for 30 min in a mixed argon and ammoniac atmosphere and then the N-P doping porous graphene can be made. The capacitance of the supercapacitor is 105 F/g and the volumetric power density is 1.19 kW/L.

Abstract: A silver particles manufacturing method comprises following steps: providing a silver containing compound; providing an organic solution; adding the silver containing compound into the organic solution, to perform ultrasonic vibrations or a heating process until the silver containing compound is dissolved completely into the organic solution, to form a silver ion solution; performing the ultrasonic vibrations or the heating process, and then let the solution settle down for a period, to form a silver particles synthesized solution; and placing the silver particles synthesized solution into a centrifuge to perform centrifugation and separation, to obtain ?m-scale silver particles and nm-scale silver particles. The silver particles manufacturing method has the advantages of low pollution, low cost, high yield, and mass production.

Abstract: A method for manufacturing a crystal ingot includes the steps of forming a crystal boule, cutting the crystal boule so as to obtain a crystal ingot from the crystal boule, and subjecting the crystal ingot to an annealing treatment which includes a heating stage, a constant temperature stage and a cooling stage.

Abstract: A thermal conductive plastic material, comprising: a plastic solution; a first thermal conductive material, filled and distributed in the plastic solution, being processed by an Atmospheric Pressure Plasma (APP) technology, and having its surface provided with hydrophilic functional groups; and a second thermal conductive material, filled and distributed in the plastic solution, being processed by the Atmospheric Pressure Plasma (APP) technology or chemical modification, and having its surface provided with hydrophilic functional groups. Wherein, the first thermal conductive material is formed by ceramic powders, the second thermal conductive material is formed by carbon-containing ingredient, while the first thermal conductive material and the second thermal conductive material are in touch with each other.

Abstract: A device for producing a continuous-growth type large-area transparent and conductive graphene film, comprising: a heating unit, used to heat a substrate; a feed-in unit, used to transform a rolling type substrate into a plane type substrate, while the substrate is transported from the feed-in unit to the heating unit; a receiving unit, used to transform the plane type substrate into the rolling type substrate; an atmosphere unit, used to control input gas flow ratio; and a plasma unit, used to turn the input gas into plasma, while a carbon source gas flows from the atmosphere unit, to the heating unit, through the plasma unit. As such, when the plane type substrate is transported through the heating unit, the transparent and conductive graphene film can be formed on the plane type substrate.

Abstract: A silver particles manufacturing method comprises following steps: providing a silver containing compound; providing an organic solution; adding the silver containing compound into the organic solution, to perform ultrasonic vibrations or a heating process until the silver containing compound is dissolved completely into the organic solution, to form a silver ion solution; performing the ultrasonic vibrations or the heating process, and then let the solution settle down for a period, to form a silver particles synthesized solution; and placing the silver particles synthesized solution into a centrifuge to perform centrifugation and separation, to obtain ?m-scale silver particles and nm-scale silver particles. The silver particles manufacturing method has the advantages of low pollution, low cost, high yield, and mass production.

Abstract: A bird control device includes a base with a control unit, a power supply unit, a sound generating device, an emitting unit, and a flashing light unit and Light Emitting Diodes connected thereto. The control unit controls the operation of the sound generating device, the emitting unit, and the flashing light unit and Light Emitting Diodes the base. The power supply unit supplies electric power to the bird control device. The sound generating device generates different types of sounds and the flashing light unit and Light Emitting Diodes control unit generates flashing light to keep birds away from the sites where the bird control device is located.

Abstract: Various embodiments of a multi-dimensional ion mobility analyzer are disclosed that have more than one drift chamber and can acquire multi-dimensional ion mobility profiles of substances. The drift chambers of this device can, for example, be operated under independent operational conditions to separate charged particles based on their distinguishable chemical/physical properties. The first dimension drift chamber of this device can be used either as a storage device, a reaction chamber, and/or a drift chamber according to the operational mode of the analyzer. Also presented are various methods of operating an ion mobility spectrometer including, but not limited to, a continuous first dimension ionization methods that can enable ionization of all chemical components in the sample regardless their charge affinity.

Abstract: A single chip type white light LED device includes a first semiconductor layer of a first doping type, a ZnMnSeTe (Zinc Manganese Selenium Tellurium) red light quantum well, a first barrier layer disposed on the ZnMnSeTe red light quantum well, a green light emitting layer including green light quantum dots disposed on the first barrier layer, a second barrier layer disposed on the green light emitting layer, a blue light emitting layer including blue light quantum dots disposed on the second barrier layer, a third barrier layer disposed on the blue light emitting layer, and a second semiconductor layer disposed on the third barrier layer.

Abstract: The present invention provides the compositions and processing methods of an environmental-friendly, multiple-effect powder. The compositions of environmental-friendly, multiple-effect powder include: cement, discarded PCB powder, resin, wasted coating powder and volcano mud powder. The environmental-friendly, multiple-effect powder of the present invention can also be widely applied to civil works as a coating/filling material or other composite building materials due to its advantages such as good thermal insulation, noise absorption, water-proofing, resistance to mildew, rustiness and acid/alkali, excellent robustness and moisture retention with better industrial and economic benefits.

Abstract: The manufacturing method of a nonvolatile memory and its structure is achieved by building a gate dielectric layer on a base. The gate dielectric contains at least two layers of different material layers. At least one hetero element is planted on the top of the gate dielectric layer so as to increase the electronic trap density. Then rebuild a new top material after removing the upmost layer of material. Finally, build a gate electrode layer on the gate dielectric layer and form source/drain electrodes at the bases of both sides of the gate dielectric layer. In this invention, with the planting of the hetero element, it will form traps in the gate dielectric layer that can catch electrons more easily. Thus, the electrons won't combine together with the increase of operation time. The storage time can be effectively extended and the problem of the combination of bites can be solved.

Abstract: The manufacturing method of a nonvolatile memory and its structure is achieved by building a gate dielectric layer on a base. The gate dielectric contains at least two layers of different material layers. At least one hetero element is planted on the top of the gate dielectric layer so as to increase the electronic trap density. Then rebuild a new top material after removing the upmost layer of4terial. Finally, build a gate electrode layer on the gate dielectric layer and form source/drain electrodes at the bases of both sides of the gate dielectric layer. In this invention, with the planting of the hetero element, it will form traps in the gate dielectric layer that can catch electrons more easily. Thus, the electrons won't combine together with the increase of operation time. The storage time can be effectively extended and the problem of the combination of bites can be solved.

Abstract: Process for fabricating self-assembled nanoparticles on buffer layers without mask making and allowing for any degree of lattice mismatch; that is, binary, ternary or quaternary nanoparticles comprising Groups III-V, II-VI or IV-VI. The process includes a first step of applying a buffer layer, a second step of turning on the purge gas to modulate the first reactant to the lower first flow rate, then the second reactant is supplied to the buffer layer to form a metal-rich island on the buffer layer, and a third step of turning on purge gas again to modulate the first reactant to the higher second flow rate onto the buffer layer. On the metal-rich island is formed the nanoparticles of the binary, ternary or quaternary III-V, II-VI and IV-IV semiconductor material. This is then recrystallized under the first reactant flow at high temperature forming high quality nanoparticles.

Abstract: A process for fabricating non-volatile memory by tilt-angle ion implantation comprises essentially the steps of implanting sideling within a nitride dielectric layer heterogeneous elements such as, for example, Ge, Si, N2, O2, and the like, for forming traps capable of capturing more electrons within the nitride dielectric layer such that electrons can be prevented from binding together as the operation time increased; etching off both ends of the original upper and underlying oxide layers to reduce the structural destruction caused by the implantation of heterogeneous elements; and finally, depositing an oxide gate interstitial wall to eradicate electron loss and hence promote the reliability of the device.