Patents by Inventor Wu-Hsi Lu
Wu-Hsi Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11637139Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: GrantFiled: April 13, 2022Date of Patent: April 25, 2023Assignee: Vanguard International Semiconductor CorporationInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11538840Abstract: A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.Type: GrantFiled: August 15, 2019Date of Patent: December 27, 2022Assignee: Vanguard International Semiconductor CorporationInventors: Wu-Hsi Lu, Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Ming-Cheng Lo, Wei-Lun Chung
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Publication number: 20220238584Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: ApplicationFiled: April 13, 2022Publication date: July 28, 2022Applicant: Vanguard International Semiconductor CorporationInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11335717Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: GrantFiled: March 22, 2019Date of Patent: May 17, 2022Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Patent number: 11217708Abstract: An optical sensor includes a substrate, a first/second/third well disposed in a sensing region, a deep trench isolation structure, and a passivation layer. The substrate has a first conductivity type and includes the sensing region. The first well has a second conductivity type and a first depth. The second well has the second conductivity type and a second depth. The third well has the first conductivity type and a third depth. The deep trench isolation structure is disposed in the substrate and surrounding the sensing region, wherein the depth of the deep trench isolation structure is greater than the first depth, the first depth is greater than the second depth, and the second depth is greater than the third depth. The passivation layer is disposed over the substrate, wherein the passivation layer includes a plurality of protruding portions disposed directly above the sensing region.Type: GrantFiled: June 2, 2020Date of Patent: January 4, 2022Assignee: Vanguard International Semiconductor CorporationInventors: Shih-Hao Liu, Chung-Ren Lao, Chih-Cherng Liao, Wu-Hsi Lu, Ming-Cheng Lo, Wei-Lun Chung, Chih-Wei Lin
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Publication number: 20210376171Abstract: An optical sensor includes a substrate, a first/second/third well disposed in a sensing region, a deep trench isolation structure, and a passivation layer. The substrate has a first conductivity type and includes the sensing region. The first well has a second conductivity type and a first depth. The second well has the second conductivity type and a second depth. The third well has the first conductivity type and a third depth. The deep trench isolation structure is disposed in the substrate and surrounding the sensing region, wherein the depth of the deep trench isolation structure is greater than the first depth, the first depth is greater than the second depth, and the second depth is greater than the third depth. The passivation layer is disposed over the substrate, wherein the passivation layer includes a plurality of protruding portions disposed directly above the sensing region.Type: ApplicationFiled: June 2, 2020Publication date: December 2, 2021Applicant: Vanguard International Semiconductor CorporationInventors: Shih-Hao LIU, Chung-Ren LAO, Chih-Cherng LIAO, Wu-Hsi LU, Ming-Cheng LO, Wei-Lun CHUNG, Chih-Wei LIN
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Publication number: 20210050378Abstract: A semiconductor device includes a conductive substrate and an encapsulation structure. The conductive substrate has a plurality of pixels. The encapsulation structure is disposed on the conductive substrate and includes at least one light-collimating unit. The light-collimating unit includes a transparent substrate and a patterned light-shielding layer. The patterned light-shielding layer is disposed on the transparent substrate. The patterned light-shielding layer has a plurality of holes disposed to correspond to the pixels.Type: ApplicationFiled: August 15, 2019Publication date: February 18, 2021Applicant: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Wu-Hsi Lu, Chung-Ren Lao, Chih-Cherng Liao, Shih-Hao Liu, Ming-Cheng Lo, Wei-Lun Chung
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Publication number: 20200303441Abstract: A semiconductor device is provided. The semiconductor device includes a substrate and a light-collimating layer. The substrate has a plurality of pixels. The light-collimating layer is disposed on the substrate, and the light-collimating layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.Type: ApplicationFiled: March 22, 2019Publication date: September 24, 2020Applicant: Vanguard International Semiconductor CorporationInventors: Chung-Ren LAO, Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Wei-Lun CHUNG, Chih-Wei LIN
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Patent number: 10680120Abstract: A semiconductor device includes a substrate, a well region formed in the substrate, first and second isolation regions formed in the substrate, a dielectric layer formed on the well region, a conductive layer formed on the dielectric layer, a first doped region, an insulating layer, and first and second contact vias. The dielectric layer is disposed between the first and second isolation regions. The first doped region is formed in the well region. The insulating layer is formed on the dielectric layer, the first and second isolation regions, and the first doped region. The first contact via is formed in the insulating layer and electrically connected to the conductive layer. The first contact via is disposed on an overlapping area between the dielectric layer and the conductive layer. The second contact via is formed in the insulating layer and electrically connected to the doped region.Type: GrantFiled: April 5, 2018Date of Patent: June 9, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Ching-Yi Hsu, Shih-Hao Liu, Wu-Hsi Lu, Yun-Chou Wei, Chih-Cherng Liao
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Patent number: 10572070Abstract: An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.Type: GrantFiled: June 25, 2018Date of Patent: February 25, 2020Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Chih-Cherng Liao, Shih-Hao Liu, Wu-Hsi Lu, Ming-Cheng Lo, Chung-Ren Lao, Yun-Chou Wei, Yin Chen, Hsin-Hui Lee, Hsueh-Jung Lin, Wen-Chih Lu, Ting-Jung Lu
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Publication number: 20190391701Abstract: An optical device is provided. The optical device includes a substrate including a plurality of pixel units, a dielectric layer disposed on the substrate, a patterned light-transmitting layer disposed on the dielectric layer and corresponding to the plurality of pixel units, and a plurality of continuous light-shielding layers disposed on the dielectric layer and located on both sides of the patterned light-transmitting layer. A method for fabricating an optical device is also provided.Type: ApplicationFiled: June 25, 2018Publication date: December 26, 2019Applicant: Vanguard International Semiconductor CorporationInventors: Chih-Cherng LIAO, Shih-Hao LIU, Wu-Hsi LU, Ming-Cheng LO, Chung-Ren LAO, Yun-Chou WEI, Yin CHEN, Hsin-Hui LEE, Hsueh-Jung LIN, Wen-Chih LU, Ting-Jung LU
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Publication number: 20190312154Abstract: A semiconductor device includes a substrate, a well region formed in the substrate, first and second isolation regions formed in the substrate, a dielectric layer formed on the well region, a conductive layer formed on the dielectric layer, a first doped region, an insulating layer, and first and second contact vias. The dielectric layer is disposed between the first and second isolation regions. The first doped region is formed in the well region. The insulating layer is formed on the dielectric layer, the first and second isolation regions, and the first doped region. The first contact via is formed in the insulating layer and electrically connected to the conductive layer. The first contact via is disposed on an overlapping area between the dielectric layer and the conductive layer. The second contact via is formed in the insulating layer and electrically connected to the doped region.Type: ApplicationFiled: April 5, 2018Publication date: October 10, 2019Applicant: Vanguard International Semiconductor CorporationInventors: Ching-Yi HSU, Shih-Hao LIU, Wu-Hsi LU, Yun-Chou WEI, Chih-Cherng LIAO
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Patent number: 10395085Abstract: Embodiments of the disclosure relate to a semiconductor device. The semiconductor device includes a semiconductor substrate, a first metal wiring layer disposed on the semiconductor substrate, an interlayer dielectric layer (ILD) disposed on the first metal wiring layer, a second metal wiring layer disposed on the interlayer dielectric layer, and a first via and a second via disposed in the interlayer dielectric layer. The second via is on the first via, and there is not any metal wiring layer in the interlayer dielectric layer.Type: GrantFiled: December 5, 2017Date of Patent: August 27, 2019Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATIONInventors: Shih-Hao Liu, Leuh Fang, Chih-Cherng Liao, Yun-Chou Wei, Chung-Ren Lao, Wu-Hsi Lu
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Publication number: 20190171857Abstract: Embodiments of the disclosure relate to a semiconductor device. The semiconductor device includes a semiconductor substrate, a first metal wiring layer disposed on the semiconductor substrate, an interlayer dielectric layer (ILD) disposed on the first metal wiring layer, a second metal wiring layer disposed on the interlayer dielectric layer, and a first via and a second via disposed in the interlayer dielectric layer. The second via is on the first via, and there is not any metal wiring layer in the interlayer dielectric layer.Type: ApplicationFiled: December 5, 2017Publication date: June 6, 2019Applicant: Vanguard International Semiconductor CorporationInventors: Shih-Hao LIU, Leuh Fang, Chih-Cherng Liao, Yun-Chou Wei, Chung-Ren Lao, Wu-Hsi Lu