Patents by Inventor Wu-Hsin Chen

Wu-Hsin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140375363
    Abstract: A frequency divider with duty cycle adjustment within a feedback loop is disclosed. In an exemplary design, an apparatus includes at least one divider circuit and at least one duty cycle adjustment circuit coupled in a feedback loop. The divider circuit(s) receive a clock signal at a first frequency and provide at least one divided signal at a second frequency, which is a fraction of the first frequency. The duty cycle adjustment circuit(s) adjust the duty cycle of the at least one divided signal and provide at least one duty cycle adjusted signal to the divider circuit(s). The divider circuit(s) may include first and second latches, and the duty cycle adjustment circuit(s) may include first and second duty cycle adjustment circuits. The first and second latches and the first and second duty cycle adjustment circuits may be coupled in a feedback loop and may perform divide-by-2.
    Type: Application
    Filed: June 25, 2013
    Publication date: December 25, 2014
    Inventors: Wu-Hsin Chen, Sriramgopal Sridhara, Li Liu
  • Publication number: 20140375367
    Abstract: In one example, a high-speed divider includes two identical pseudo-CML latches and four output inverters. Each latch includes a pair of cross-coupled signal holding transistors. A first P-channel pull-up circuit pulls up on a second output node QB of the latch. A second P-channel pull-up circuit pulls up on a first output node Q of the latch. A pull-down circuit involves four N-channel transistors. This pull-down circuit: 1) couples the QB node to ground when a clock signal CK is high and a data signal D is high, 2) couples the Q node to ground when CK is high and D is low, 3) prevents a transfer of charge between the QB and Q nodes through the pull-down circuit when D transitions during a time period when CK is low, and 4) decouples the QB and Q nodes from the pull-down circuit when CK is low.
    Type: Application
    Filed: June 25, 2013
    Publication date: December 25, 2014
    Inventors: Wu-Hsin Chen, Li Liu, Jianyun Hu
  • Patent number: 8874059
    Abstract: A method for reducing power consumption on a wireless communication device is described. The wireless communication device includes a first stage active filter and a second stage active filter. A condition measurement is obtained that includes a signal measurement condition. If it is determined that the condition measurement is above a threshold, the second stage active filter is bypassed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 28, 2014
    Assignee: QUALCOMM, Incorporated
    Inventors: Li Liu, Steven C Ciccarelli, Shrenik Patel, Prasad Srinivasa Siva Gudem, Zixiang Yang, Frederic Bossu, Wu-Hsin Chen, Chiewcharn Narathong
  • Publication number: 20140273901
    Abstract: A method for reducing power consumption on a wireless communication device is described. The wireless communication device includes a first stage active filter and a second stage active filter. A condition measurement is obtained that includes a signal measurement condition. If it is determined that the condition measurement is above a threshold, the second stage active filter is bypassed.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Li Liu, Steven C. Ciccarelli, Shrenik Patel, Prasad Srinivasa Siva Gudem, Zixiang Yang, Frederic Bossu, Wu-Hsin Chen, Chiewcharn Narathong