Patents by Inventor Wu Tao TU

Wu Tao TU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10886181
    Abstract: Semiconductor device is provided. The semiconductor device includes a base substrate and a first dielectric layer on the base substrate. The first dielectric layer contains a first trench and a second trench passing therethrough, and a width of the second trench is larger than a width of the first trench. The semiconductor device further includes a first gate dielectric layer and a first gate electrode in the first trench. A first recess is on the first gate dielectric layer between the first gate electrode and the first dielectric layer. The semiconductor device further includes a second gate dielectric layer and a second gate electrode in the second trench. A second recess is on the second gate dielectric layer between the second gate electrode and the first dielectric layer. The semiconductor device further includes a first protection layer in the first recess and a second protection layer in the second recess.
    Type: Grant
    Filed: April 29, 2020
    Date of Patent: January 5, 2021
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, SMIC New Technology Research and Development (Shanghai) Corporation
    Inventors: Zhi Dong Wang, Cheng Long Zhang, Wu Tao Tu
  • Publication number: 20200258787
    Abstract: Semiconductor device is provided. The semiconductor device includes a base substrate and a first dielectric layer on the base substrate. The first dielectric layer contains a first trench and a second trench passing therethrough, and a width of the second trench is larger than a width of the first trench. The semiconductor device further includes a first gate dielectric layer and a first gate electrode in the first trench. A first recess is on the first gate dielectric layer between the first gate electrode and the first dielectric layer. The semiconductor device further includes a second gate dielectric layer and a second gate electrode in the second trench. A second recess is on the second gate dielectric layer between the second gate electrode and the first dielectric layer. The semiconductor device further includes a first protection layer in the first recess and a second protection layer in the second recess.
    Type: Application
    Filed: April 29, 2020
    Publication date: August 13, 2020
    Inventors: Zhi Dong WANG, Cheng Long ZHANG, Wu Tao TU
  • Patent number: 10679902
    Abstract: Semiconductor device and fabrication method are provided.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: June 9, 2020
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, SMIC New Technology Research and Development (Shanghai) Corporation
    Inventors: Zhi Dong Wang, Cheng Long Zhang, Wu Tao Tu
  • Publication number: 20190206739
    Abstract: Semiconductor device and fabrication method are provided.
    Type: Application
    Filed: December 27, 2018
    Publication date: July 4, 2019
    Inventors: Zhi Dong WANG, Cheng Long ZHANG, Wu Tao TU