Abstract: A fabrication system for fabricating IC is provided. A processing tool includes at least one electrode and a RF sensor. The electrode is configured to receive a radio frequency (RF) signal from an RF signal generator during first and second semiconductor manufacturing processes. The RF sensor wirelessly detects intensity of the RF signal. A computation device extracts statistical characteristics with a sampling rate based on the detected intensity of the RF signal. A fault detection and classification (FDC) system includes a processor. The processor is configured to determine whether or not the detected intensity of the RF signal exceeds a threshold value or a threshold range according to the extracted statistical characteristics. When the detected intensity of the RF signal exceeds the threshold value or the threshold range, the processor notifies the processing tool to adjust the RF signal or stop tool to check parts damage.

Abstract: A method of aligning two wafers during a bonding process includes aligning a first wafer having a plurality of alignment markings with a second wafer having a plurality of alignment markings. The method further includes placing a plurality of flags between the first wafer and the second wafer. The method further includes detecting movement of the plurality of flags with respect to the first wafer and the second wafer using at least one sensor. The method further includes determining whether the wafers remain aligned within an alignment tolerance based on the detected movement of the plurality of flags relative to the first wafer and the second wafer.

Abstract: A fabrication system for fabricating an IC is provided which includes a processing tool, a computation device and a FDC system. The processing tool includes an electrode and an RF sensor to execute a semiconductor manufacturing process to fabricate the IC. The RF sensor wirelessly detects the intensity of the RF signal. The computation device extracts statistical characteristics based on the detection of the intensity of the RF signal. The FDC system determines whether or not the intensity of the RF signal meets a threshold value or a threshold range according to the extracted statistical characteristics. When the detected intensity of the RF signal exceeds the threshold value or the threshold range, the FDC system notifies the processing tool to adjust the RF signal or stop tool to check parts damage.

Abstract: A method of aligning two wafers during a bonding process includes aligning a first wafer having a plurality of alignment markings with a second wafer having a plurality of alignment markings. The method further includes placing a plurality of flags between the first wafer and the second wafer. The method further includes detecting movement of the plurality of flags with respect to the first wafer and the second wafer using at least one sensor. The method further includes determining whether the wafers remain aligned within an alignment tolerance based on the detected movement of the plurality of flags relative to the first wafer and the second wafer.

Abstract: An apparatus includes an alignment module configured to align a first wafer and a second wafer based on alignment markers on the first wafer and corresponding alignment markers on the second wafer. The apparatus further includes a flag placement module configured to insert a plurality of flags between the first wafer and the second wafer, a flag-out mechanism configured to simultaneously move the plurality of flags to a flag-out position, and a controller configured to determine whether the wafers remain aligned within an alignment tolerance based on an amount of time for each flag of the plurality of flags to reach the flag-out position.

Abstract: An apparatus includes an alignment module configured to align a first wafer and a second wafer based on alignment markers on the first wafer and corresponding alignment markers on the second wafer. The apparatus further includes a flag placement module configured to insert a plurality of flags between the first wafer and the second wafer, a flag-out mechanism configured to simultaneously move the plurality of flags to a flag-out position, and a controller configured to determine whether the wafers remain aligned within an alignment tolerance based on an amount of time for each flag of the plurality of flags to reach the flag-out position.

Abstract: An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers.

Abstract: A fabrication system for fabricating an IC is provided which includes a processing tool, a computation device and a FDC system. The processing tool includes an electrode and an RF sensor to execute a semiconductor manufacturing process to fabricate the IC. The RF sensor wirelessly detects the intensity of the RF signal. The computation device extracts statistical characteristics based on the detection of the intensity of the RF signal. The FDC system determines whether or not the intensity of the RF signal meets a threshold value or a threshold range according to the extracted statistical characteristics. When the detected intensity of the RF signal exceeds the threshold value or the threshold range, the FDC system notifies the processing tool to adjust the RF signal or stop tool to check parts damage.

Abstract: An apparatus includes a bonding system configured to bond at least two wafers. The bonding system has a flag-out mechanism configured to remove a plurality of flags from an area between the at least two wafers. The apparatus also includes sensors configured to detect data related to a flag-out condition of the flags of the plurality of flag. The apparatus further includes at least one processor configured to receive inputs from the sensors, to calculate at least one value related to flag-out timing, and to drive a display indicating an alignment of the at least two wafers.

Abstract: An apparatus is disclosed for detecting flag velocity during a eutectic process for bonding two wafers. The apparatus includes a plurality of sensors for detecting a time and/or velocity of a plurality of flags within a flag-out mechanism. The apparatus also includes one or more displays displaying time durations associated with the movement of the flags during the bonding process. Also disclosed is a method of aligning wafers in a eutectic bonding process. The method includes determining one or more time durations associated with the movement of the flags in the plurality of flags. The method also includes determining if a misalignment has occurred based on the one or more time durations associated with the movement of the flags.

Abstract: An apparatus is disclosed for detecting flag velocity during a eutectic process for bonding two wafers. The apparatus includes a plurality of sensors for detecting a time and/or velocity of a plurality of flags within a flag-out mechanism. The apparatus also includes one or more displays displaying time durations associated with the movement of the flags during the bonding process. Also disclosed is a method of aligning wafers in a eutectic bonding process. The method includes determining one or more time durations associated with the movement of the flags in the plurality of flags. The method also includes determining if a misalignment has occurred based on the one or more time durations associated with the movement of the flags.