Abstract: Provided are shift register, driving method thereof, gate driving circuit and display device. The shift register includes input circuit, pull-up circuit, reset circuit, at least one noise reduction circuit, and at least one pull-down node control circuit. At least one pull-down node control circuit is coupled to at least one pull-down node, low voltage signal terminal, and reset signal terminal, and configured to control voltage level of at least one pull-down node according to signal of reset signal terminal. At least one pull-down node control circuit controls level of at least one pull-down node to second level higher than or equal to on level in response to signal of reset signal terminal having on level, and controls voltage level of at least one pull-down node to third level between on level and first level in response to signal of reset signal terminal transitioning from on level to off level.

Abstract: An electrostatic discharge unit, an array substrate and a display panel are provided. The electrostatic discharge unit includes: an active layer; a first gate electrode and a second gate electrode which are spaced apart from each other and are insulated from the active layer; and a first electrode and a second electrode which are spaced apart from each other and are respectively connected to the active layer. The first gate electrode is electrically connected to the first electrode, and the second gate electrode is electrically connected to the second electrode.

Abstract: A pixel circuit, a method thereof, an electroluminescent panel, and a display device are provided. The pixel circuit includes a first switch sub-circuit, a second switch sub-circuit, a luminescent sub-circuit, and a dual-drive sub-circuit. Through improving the pixel circuit, a first driving terminal of the dual-drive sub-circuit connects to a first node, a second driving terminal of the dual-drive sub-circuit connects to the second node, when a first and a second gate line signal terminal input the gate line scanning signal alternatively, the first and the second switch sub-circuit are working alternatively, cause the first and the second driving terminal are working alternatively, thus to drive the luminescent sub-circuit to emit light. Therefore, the two driving terminals work alternatively to avoid the voltage instability due to threshold voltage shift caused by one driving terminal of the dual-drive sub-circuit works for a long time.

Abstract: Provided are shift register, driving method thereof, gate driving circuit and display device. The shift register includes input circuit, pull-up circuit, reset circuit, at least one noise reduction circuit, and at least one pull-down node control circuit. At least one pull-down node control circuit is coupled to at least one pull-down node, low voltage signal terminal, and reset signal terminal, and configured to control voltage level of at least one pull-down node according to signal of reset signal terminal. At least one pull-down node control circuit controls level of at least one pull-down node to second level higher than or equal to on level in response to signal of reset signal terminal having on level, and controls voltage level of at least one pull-down node to third level between on level and first level in response to signal of reset signal terminal transitioning from on level to off level.

Abstract: The present disclosure provides an oxide semiconductor layer and a preparation method thereof, device, substrate, and means, and belongs to the field of semiconductor technologies. The method includes: forming an oxide semiconductor layer having multiply types of regions on a substrate, at least two types of the multiple types of regions having different thicknesses, and adjusting an oxygen content of at least one type of regions in the multiply types of regions, so that the oxygen content and the thickness in the multiple types of regions are positively correlated.

Abstract: A pixel circuit, a method thereof, an electroluminescent panel, and a display device are provided. The pixel circuit includes a first switch sub-circuit, a second switch sub-circuit, a luminescent sub-circuit, and a dual-drive sub-circuit. Through improving the pixel circuit, a first driving terminal of the dual-drive sub-circuit connects to a first node, a second driving terminal of the dual-drive sub-circuit connects to the second node, when a first and a second gate line signal terminal input the gate line scanning signal alternatively, the first and the second switch sub-circuit are working alternatively, cause the first and the second driving terminal are working alternatively, thus to drive the luminescent sub-circuit to emit light. Therefore, the two driving terminals work alternatively to avoid the voltage instability due to threshold voltage shift caused by one driving terminal of the dual-drive sub-circuit works for a long time.

Abstract: An electrostatic discharge unit, an array substrate and a display panel are provided. The electrostatic discharge unit includes: an active layer; a first gate electrode and a second gate electrode which are spaced apart from each other and are insulated from the active layer; and a first electrode and a second electrode which are spaced apart from each other and are respectively connected to the active layer. The first gate electrode is electrically connected to the first electrode, and the second gate electrode is electrically connected to the second electrode.

Abstract: A detector pixel, an array substrate, an apparatus and a method for detecting an intensity of a ray are provided. The detector pixel includes substrate, first transistor, second transistor, storage capacitor, photosensitive element, first control line, second control line, first data line and second data line. The first and the second transistors are dual-gate transistors; the first transistor has a bottom gate connected to the first control line, a top gate connected to the second control line, a first electrode connected to the storage capacitor, and a second electrode connected to the first data line; the second transistor has a bottom gate connected to the second control line, a top gate connected to the first control line, a first electrode connected to the storage capacitor, and a second electrode connected to the second data line; and the storage capacitor is connected to the photosensitive element.

Abstract: A shift register circuit is disclosed that includes an input control circuit configured to set a first node at a first potential in response to an active pulse signal from a signal input terminal, an output control circuit configured to supply a clock signal from a first clock signal terminal to a signal output terminal in response to the first node being at the first potential, the first potential being less than a potential of the active pulse signal and greater than or equal to a potential for maintaining operation of the output control circuit, and a reset circuit configured to supply a reference voltage from a reference voltage terminal to the first node and the signal output terminal in response to a reset signal.

Abstract: The embodiments of the present disclosure provide a shift register, a method for driving the same, and a gate driving circuit. A pull-down sub-circuit of the shift register is under the control of a third clock signal terminal and a fourth clock signal terminal, wherein signals of the third clock signal terminal and the fourth clock signal terminal are mutually inverted signals, and signal periods of the third clock signal terminal and the fourth clock signal terminal are a half of a signal period of a first clock signal terminal or a second clock signal terminal.

Abstract: A detector pixel, an array substrate, an apparatus and a method for detecting an intensity of a ray are provided. The detector pixel includes substrate, first transistor, second transistor, storage capacitor, photosensitive element, first control line, second control line, first data line and second data line. The first and the second transistors are dual-gate transistors; the first transistor has a bottom gate connected to the first control line, a top gate connected to the second control line, a first electrode connected to the storage capacitor, and a second electrode connected to the first data line; the second transistor has a bottom gate connected to the second control line, a top gate connected to the first control line, a first electrode connected to the storage capacitor, and a second electrode connected to the second data line; and the storage capacitor is connected to the photosensitive element.

Abstract: The present disclosure provides an oxide semiconductor layer and a preparation method thereof, device, substrate, and means, and belongs to the field of semiconductor technologies. The method includes: forming an oxide semiconductor layer having multiply types of regions on a substrate, at least two types of the multiple types of regions having different thicknesses, and adjusting an oxygen content of at least one type of regions in the multiply types of regions, so that the oxygen content and the thickness in the multiple types of regions are positively correlated.

Abstract: A shift register includes a first input circuit, a second input circuit, and a pull-up transistor. The first input circuit is coupled to a first input terminal and a first pull-up node, and configured to electrically connect the first input terminal to the first pull-up node when the first input terminal receives an active signal. The second input circuit is coupled to a second input terminal and a second pull-up node, and configured to electrically connect the second input terminal to the second pull-up node when the second input terminal receives an active signal. The pull-up transistor includes a first gate electrode coupled to the first pull-up node and a second gate electrode coupled to the second pull-up node.

Abstract: A film test structure and an array substrate are provided. The film test structure includes a conductive film to be tested; a plurality of test leads arranged at a different layer from the conductive film to be tested and electrically connected with the conductive film to be tested respectively; and a plurality of test terminals electrically connected with the plurality of test leads respectively.

Abstract: A shift register includes a first input circuit, a second input circuit, and a pull-up transistor. The first input circuit is coupled to a first input terminal and a first pull-up node, and configured to electrically connect the first input terminal to the first pull-up node when the first input terminal receives an active signal. The second input circuit is coupled to a second input terminal and a second pull-up node, and configured to electrically connect the second input terminal to the second pull-up node when the second input terminal receives an active signal. The pull-up transistor includes a first gate electrode coupled to the first pull-up node and a second gate electrode coupled to the second pull-up node.

Abstract: The embodiments of the present disclosure provide a shift register, a method for driving the same, and a gate driving circuit. A pull-down sub-circuit of the shift register is under the control of a third clock signal terminal and a fourth clock signal terminal, wherein signals of the third clock signal terminal and the fourth clock signal terminal are mutually inverted signals, and signal periods of the third clock signal terminal and the fourth clock signal terminal are a half of a signal period of a first clock signal terminal or a second clock signal terminal.

Abstract: The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.

Abstract: A shift register circuit is disclosed that includes an input control circuit configured to set a first node at a first potential in response to an active pulse signal from a signal input terminal, an output control circuit configured to supply a clock signal from a first clock signal terminal to a signal output terminal in response to the first node being at the first potential, the first potential being less than a potential of the active pulse signal and greater than or equal to a potential for maintaining operation of the output control circuit, and a reset circuit configured to supply a reference voltage from a reference voltage terminal to the first node and the signal output terminal in response to a reset signal.

Abstract: The present disclosure provides a shift register unit, which includes an input circuit, a reset circuit, a noise reduction circuit, and an output circuit. The input circuit is configured to control a voltage of a first node based on a first input signal and a second input signal, and control a voltage of a second node based on a first voltage and the voltage of the first node. The reset circuit is configured to reset the voltage of the first node and the voltage of the second node. The noise reduction circuit is configured to maintain a reset voltage of the first node and a reset voltage of the second node. The output circuit is configured to provide, for an output terminal of the output circuit, a second clock signal from a second clock signal terminal or the second voltage. The shift register unit is composed of switch elements.

Abstract: A film test structure and an array substrate are provided. The film test structure includes a conductive film to be tested; a plurality of test leads arranged at a different layer from the conductive film to be tested and electrically connected with the conductive film to be tested respectively; and a plurality of test terminals electrically connected with the plurality of test leads respectively.