Patents by Inventor Wuyang ZHAO
Wuyang ZHAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230105052Abstract: The display substrate includes a display area, a barrier wall disposing area, and a hole area, the display area surrounds the barrier wall disposing area, the barrier wall disposing area surrounds the hole area, and the method for manufacturing the display substrate includes: after a first electrode of a light emitting device of the display substrate is formed, removing a protective layer of the barrier wall disposing area, and exposing at least one circle of an initial barrier wall covered by the protective layer, the initial barrier wall is disposed around the hole area; and etching the at least one circle of the initial barrier wall, to form at least one circle of a barrier wall, a notch is formed on at least one side surface of the barrier wall.Type: ApplicationFiled: December 11, 2019Publication date: April 6, 2023Inventors: Pinchao GU, Weiyun HUANG, Donghua JIANG, Wuyang ZHAO
-
Publication number: 20230050620Abstract: The present disclosure relates to a display substrate and a display device thereof. The display substrate comprises: a substrate; a first wiring extending in a first direction on the substrate; a first dielectric layer on the substrate and the first wiring; a second wiring extending in the first direction on the first dielectric layer, wherein an orthographic projection of the second wiring on the substrate at least partially overlaps with an orthographic projection of the first wiring on the substrate; a conformal dielectric layer on the first dielectric layer and the second wiring; a third wiring and a fourth wiring disposed at spacings in the first direction on the conformal dielectric layer, wherein orthographic projections of the third wiring and the fourth wiring on the substrate at least partially overlap with the orthographic projections of the first wiring and the second wiring on the substrate.Type: ApplicationFiled: August 5, 2021Publication date: February 16, 2023Inventors: Liang SONG, Jiahao XU, Dongliang LU, Fei LIAO, Donghua JIANG, Guobo YANG, Pengyu LIAO, Wuyang ZHAO
-
Publication number: 20220344619Abstract: The present disclosure provides a display panel and a manufacture method thereof. The display panel has a through hole penetrating the display panel wherein the display panel further has a water and oxygen insulation structure having: a substrate; a plurality of ring-shaped insulation walls; and a light emitting layer; wherein in a direction outwards from a center of the through hole, at least one side of at least one of the plurality of ring-shaped insulation walls has an undercut, such that the light emitting layer is discontinuous at the undercut, and opposite sides of any two adjacent ones of the plurality of ring-shaped insulation walls do not both have an undercut.Type: ApplicationFiled: April 8, 2021Publication date: October 27, 2022Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Wuyang Zhao, Xiaoliang Guo, Liang Song, Guodong Liu, Zhongfei Dong
-
Patent number: 11443661Abstract: A flexible display substrate and a method for manufacturing the same are provided. The method includes: forming a first insulating layer on a flexible base substrate; forming an etching barrier layer on a side of the first insulating layer away from the flexible base substrate; forming a second insulating layer covering the etching barrier layer on the side of the first insulating layer away from the flexible base substrate; and forming a first opening in the first insulating layer and a second opening in the second insulating layer through one patterning process, so that an orthographic projection of the first opening on the flexible base substrate falls within an orthographic projection of the second opening on the flexible base substrate, so as to form a step portion at a connection position where the first opening is connected to the second opening.Type: GrantFiled: April 10, 2020Date of Patent: September 13, 2022Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BEIJING BOE TECHNOLOGY DEVELOPMENT CO., LTD.Inventors: Liang Song, Yufei Ji, Pengyu Liao, Jiahao Xu, Hao Cheng, Wuyang Zhao, Long Jiang, Fei Ou, Jun Peng
-
Publication number: 20210272485Abstract: A flexible display substrate and a method for manufacturing the same are provided. The method includes: forming a first insulating layer on a flexible base substrate; forming an etching barrier layer on a side of the first insulating layer away from the flexible base substrate; forming a second insulating layer covering the etching barrier layer on the side of the first insulating layer away from the flexible base substrate; and forming a first opening in the first insulating layer and a second opening in the second insulating layer through one patterning process, so that an orthographic projection of the first opening on the flexible base substrate falls within an orthographic projection of the second opening on the flexible base substrate, so as to form a step portion at a connection position where the first opening is connected to the second opening.Type: ApplicationFiled: April 10, 2020Publication date: September 2, 2021Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Liang Song, Yufei Ji, Pengyu Liao, Jiahao Xu, Hao Cheng, Wuyang Zhao, Long Jiang, Fei Ou, Jun Peng
-
Patent number: 10944073Abstract: The present application discloses a display panel having a display area and a peripheral area. The display panel includes a base substrate; a display unit on the base substrate; an encapsulating layer on a side of the display unit distal to the base substrate and encapsulating the display unit; and a first crack barrier layer on the base substrate and in the peripheral area and forming a first enclosure substantially surrounding a first area. The encapsulating layer includes a first inorganic sub-layer. The first inorganic sub-layer includes a first part enclosed inside the first area by the first crack barrier layer.Type: GrantFiled: December 5, 2017Date of Patent: March 9, 2021Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Weiyun Huang, Zhenxiao Tong, Wuyang Zhao, Youngyik Ko
-
Publication number: 20200127228Abstract: The present application discloses a display panel having a display area and a peripheral area. The display panel includes a base substrate; a display unit on the base substrate; an encapsulating layer on a side of the display unit distal to the base substrate and encapsulating the display unit; and a first crack barrier layer on the base substrate and in the peripheral area and forming a first enclosure substantially surrounding a first area. The encapsulating layer includes a first inorganic sub-layer. The first inorganic sub-layer includes a first part enclosed inside the first area by the first crack barrier layer.Type: ApplicationFiled: December 5, 2017Publication date: April 23, 2020Applicants: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Weiyun Huang, Zhenxiao Tong, Wuyang Zhao, Youngyik Ko
-
Patent number: 9564354Abstract: The present invention discloses a via-hole etching method related to semiconductor manufacturing field, and the method overcomes the defects of an uncontrollable end point of a via-hole and an unfavorable profile-angle in a conventional via-hole etching method. The via-hole etching method includes: forming a structure for via-hole etching, includes: a low-temperature poly-silicon layer, a gate insulating layer, a gate metal layer and an interlayer insulating layer, which are sequentially formed on a substrate; forming a mask layer comprising a via-hole masking pattern on the structure for via-hole etching; by using a first etching process, etching the structure for via-hole etching to a first thickness of the gate insulating layer; by using a second etching process, etching the structure for via-hole etching to etch away the remaining thickness of the gate insulating layer, and uncovering the low-temperature poly-silicon layer; removing the mask layer to form a via-hole structure.Type: GrantFiled: December 3, 2013Date of Patent: February 7, 2017Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Byung Chun Lee, Donghua Jiang, Yongyi Fu, Wuyang Zhao, Chundong Li
-
Publication number: 20150303099Abstract: The present invention discloses a via-hole etching method related to semiconductor manufacturing field, and the method overcomes the defects of an uncontrollable end point of a via-hole and an unfavorable profile-angle in a conventional via-hole etching method. The via-hole etching method includes: forming a structure for via-hole etching, includes: a low-temperature poly-silicon layer, a gate insulating layer, a gate metal layer and an interlayer insulating layer, which are sequentially formed on a substrate; forming a mask layer comprising a via-hole masking pattern on the structure for via-hole etching; by using a first etching process, etching the structure for via-hole etching to a first thickness of the gate insulating layer; by using a second etching process, etching the structure for via-hole etching to etch away the remaining thickness of the gate insulating layer, and uncovering the low-temperature poly-silicon layer; removing the mask layer to form a via-hole structure.Type: ApplicationFiled: December 3, 2013Publication date: October 22, 2015Inventors: Byung Chun LEE, Donghua JIANG, Yongyi FU, Wuyang ZHAO, Chundong LI
-
Patent number: D747984Type: GrantFiled: August 30, 2014Date of Patent: January 26, 2016Assignees: Sensoro Co. Ltd.Inventors: Wuyang Zhao, Ruojiao Zhang, Xin Zheng, Xiaofei Yuan, Mingming Zhang