Abstract: This invention relates to a process to produce propylene polymers comprising contacting a metallocene catalyst compound and an activator in a reaction medium comprising propylene, from 0 to 30 volume % of one or more solvents and from 0 to 30 mole % of one or more comonomers, under temperature and pressure conditions below the melting point of the propylene polymer and where: a) the temperature is at or above the critical temperature for the reaction medium, and the pressure is at least 500 kPa above the critical pressure of the reaction medium; or b) the temperature is 1° C. or more above the critical temperature for the reaction medium, and the pressure is at or above the critical pressure of the reaction medium; or c) the temperature is 1° C. or more above the critical temperature for the reaction medium, and the pressure is at least 500 kPa above the critical pressure of the reaction medium.

Abstract: A method of attaching a molecular layer to a substrate includes attaching a temporary protecting group(s) to a molecule having a molecular switching moiety with first and second connecting groups attached to opposed ends thereof. The temporary protecting group(s) is attached to the first and/or second connecting group so as to cause the opposed ends of the switching moiety to exhibit a difference in hydrophilicity such that one of the ends remains at at least one of a water/solvent interface and a water/air interface, and the other end remains in air during a Langmuir-Blodgett (LB) process. An LB film is formed on the interface. The temporary protecting group(s) is removed. The substrate is passed through the LB film to form the molecular layer chemically bonded on the substrate. The difference in hydrophilicity between the opposed ends causes formation of a substantially well-oriented, uniform LB film at the interface.

Abstract: A molecular layer includes a Langmuir-Blodgett (LB) film of a molecule connected to a plurality of active device molecules, the molecule having a moiety with first and second connecting groups at opposed ends of the moiety. Each of the plurality of active device molecules includes a switching moiety, a self-assembling connecting group at one end of the switching moiety, and a linking group at an opposed end of the moiety. One or more defect site(s) exist between the plurality of active device molecules. A respective number of the first connecting groups of the LB film are connected to the plurality of active device molecules via at least some of the linking groups such that the LB film covers the plurality of active device molecules and the one or more defect site(s).

Abstract: Extracts from plants in the Asteridae subfamily, such as Carthamus tinctorious, are effective to selectively inhibit COX-2 activity and/or enhance COX-1 activity. When Asteridae extracts are combined with boswellic acid, the combination exhibits a synergistic inhibitory effect on both COX-2 and LO. Such extracts and combinations are used in methods of selectively inhibiting COX-2, inhibiting LO, and/or enhancing COX-1 activity as well as in the methods of treating conditions that would respond favorably to any of these effects.

Abstract: In one embodiment, a wordline decoder provides access to cache memory locations when addresses are bypassed directly from arithmetic circuitry in redundant form. The wordline decoder is also designed to provide access to cache memory locations when addresses are received from registers in an unsigned binary form. The combined functionality is provided in a pre-decode circuit by selectively replacing one of a plurality of redundant bit vectors with a constant bit vector when redundant addressing is not enabled.

Abstract: An integrated circuit (10) includes a central processing unit (12), an instruction cache (14), a data cache (16), and a trace recorder. The central processing unit (12) interacts with the instruction cache (14) and the data cache (16) in order to execute instructions. Information passed between the central processing unit (12), the instruction cache (14), and the data cache (16) not normally available for external analysis may be captured by the trace recorder (20) in response to various triggering events. The information captured by the trace recorder (20) may subsequently be provided to external test equipment in order to analyze the operation of the central processing unit (12) for failure correction.

Abstract: Metal-ligand complexes, including cobalt-ligand complexes, such as a cobalt-porphyrin complex, and their use as catalysts in the cyclization of alkenes.

Abstract: According to one embodiment, an integrated circuit is disclosed. The integrated circuit includes a plurality of circuit blocks. Each circuit block includes a voltage differentiator that generates a local supply for the circuit block.

Abstract: A system for approximating a least recently used (LRU) algorithm for memory replacement in a cache memory. In one system example, the cache memory comprises memory blocks allocated into sets of N memory blocks. The N memory blocks are allocated as M super-ways of N/M memory blocks where N is greater than M. An index identifies the set of N memory blocks. A super-way hit/replacement tracking state machine tracks hits and replacements to each super-way and maintains state corresponding to an order of hits and replacements for each super-way where the super-ways are ordered from the MRU to the LRU. Storage for the state bits is associated with each index entry where the state bits include code bits associated with a memory block to be replaced within a LRU super-way. LRU logic is coupled to the super-way hit/replacement tracking state machine to select an LRU super-way as a function of the super-way hit and replacement history.

Abstract: According to one embodiment, an integrated circuit is disclosed. The integrated circuit includes a plurality of circuit blocks. Each circuit block includes a voltage differentiator that generates a local supply for the circuit block.

Abstract: Processes for transitioning among polymerization catalyst systems, preferably catalyst systems that are incompatible with each other. In particular, the processes relate to transitioning from olefin polymerizations utilizing metallocene catalyst systems to olefin polymerizations utilizing traditional Ziegler-Natta catalyst systems.

Abstract: For one embodiment of the present invention, a processor may include one or more integrated voltage regulators powered by an external voltage regulator and generating one or more local supply voltages for the processor. The one or more local supply voltages may be set to allow one or more circuits powered by the local supply voltage(s) to meet a timing requirement. The local supply voltage(s) may be adjusted by the processor in accordance with a power management policy.

Abstract: Novel methods of synthesizing heteroatom-containing chiral porphyrins and chiral metalloporphyrins and the novel chiral porphyrins and chiral metalloporphyrins themselves are disclosed. Metal complexes of the chiral porphyrins are prepared in high yields and shown to be active catalysts for highly enantioselective and diastereoselective cyclopropanation, aziridination, and epoxidation of alkenes under a practical one-pot protocol.

Abstract: A cache memory includes a plurality of data memory blocks and a code memory block. Each data memory block has a plurality of storage locations and has a particular storage location identified by a same index value. The code memory block has a plurality of code values with a particular code value being associated with the same index value. The particular code value is operable to identify which ones of the particular storage locations associated with the same index value are locked to prevent alteration of contents therein. The particular code value is also operable to identify which particular storage location has been most recently used and which particular storage location has been least recently used of the particular storage locations associated with the same index value.

Abstract: A novel buffer design including a differential driver circuit provides an improved overall performance to a microprocessor by reducing the number of cycles required by the microprocessor to access data from a cache memory during a split cache line access. In one embodiment of the present invention, when a request to access data from a cache memory comes from a microprocessor, during a first cycle, a first sense amplifier coupled to the cache memory senses a first cache line from the cache memory. Then a first input driver circuit coupled to the first sense amplifier receives the sensed first cache line and stores the first cache line in a split buffer. Then the first sense amplifier senses a second cache line from the cache memory. Then a second sense amplifier coupled to the split buffer senses the stored first cache line from the split buffer.

Abstract: A novel buffer design including a differential driver circuit provides an improved overall performance to a microprocessor by reducing the number of cycles required by the microprocessor to access data from a cache memory during a split cache line access. In one embodiment of the present invention, when a request to access data from a cache memory comes from a microprocessor, during a first cycle, a first sense amplifier coupled to the cache memory senses a first cache line from the cache memory. Then a first input driver circuit coupled to the first sense amplifier receives the sensed first cache line and stores the first cache line in a split buffer. Then the first sense amplifier senses a second cache line from the cache memory. Then a second sense amplifier coupled to the split buffer senses the stored first cache line from the split buffer.

Abstract: In an integrated circuit, a low voltage swing logic communication bus has N+2 data wires for N data signals. Each of the N data signals is carried on its own wire. The communication bus includes two other reference signals.

Abstract: Extracts from plants in the Asteridae subfamily, such as Carthamus tinctorious, are effective to selectively inhibit COX-2 activity and/or enhance COX-1 activity. When Asteridae extracts are combined with boswellic acid, the combination exhibits a synergistic inhibitory effect on both COX-2 and LO. Such extracts and combinations are used in methods of selectively inhibiting COX-2, inhibiting LO, and/or enhancing COX-1 activity as well as in the methods of treating conditions that would respond favorably to any of these effects.

Abstract: A novel buffer design including a differential driver circuit provides an improved overall performance to a microprocessor by reducing the number of cycles required by the microprocessor to access data from a cache memory during a split cache line access. In one embodiment of the present invention, when a request to access data from a cache memory comes from a microprocessor, during a first cycle, a first sense amplifier coupled to the cache memory senses a first cache line from the cache memory. Then a first input driver circuit coupled to the first sense amplifier receives the sensed first cache line and stores the first cache line in a split buffer. Then the first sense amplifier senses a second cache line from the cache memory. Then a second sense amplifier coupled to the split buffer senses the stored first cache line from the split buffer.

Abstract: According to one embodiment, a memory cell is disclosed. The memory cell includes a first PMOS transistor, a first NMOS transistor coupled to the first PMOS transistor, a second PMOS transistor and a second NMOS transistor coupled to the first PMOS transistor. The first and second PMOS transistors receiving a bias control signal.