Patents by Inventor Xavier Bru

Xavier Bru has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD FOR CONFIGURING AN IT SYSTEM, CORRESPONDING COMPUTER PROGRAM AND IT SYSTEM
    Publication number: 20180267829
    Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.
    Type: Application
    Filed: May 24, 2018
    Publication date: September 20, 2018
    Inventors: Xavier BRU, Philippe GARRIGUES, Benoît WELTERLEN
  • Method for configuring an it system, corresponding computer program and it system
    Patent number: 10007553
    Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: June 26, 2018
    Assignee: BULL SAS
    Inventors: Xavier Bru, Philippe Garrigues, Benoît Welterlen
  • Method for optimizing management of standby of a microprocessor enabling the implementation of several logical cores and computer program implementing such a method
    Patent number: 9910474
    Abstract: The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420).
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: March 6, 2018
    Assignee: BULL SAS
    Inventors: Xavier Bru, Francois Wellenreiter, Benoit Welterlen
  • METHOD FOR OPTIMIZING MANAGEMENT OF STANDBY OF A MICROPROCESSOR ENABLING THE IMPLEMENTATION OF SEVERAL LOGICAL CORES AND COMPUTER PROGRAM IMPLEMENTING SUCH A METHOD
    Publication number: 20130091368
    Abstract: The subject of the invention is in particular the optimization of standby management of a part of a microprocessor allowing implementation of at least two logic cores, said at least one microprocessor comprising means for placing at least one resource non common to said at least two logic cores on standby. After having determined (400) a desired standby state for each of said at least two logic cores, said desired standby state of one of said at least two logic cores is compared with the said desired standby state of the other of said at least two logic cores. In response to said comparison, instructions preparing for said placement on standby and/or allowing the restoration of said one of said at least two logic cores are launched (420).
    Type: Application
    Filed: May 13, 2011
    Publication date: April 11, 2013
    Applicant: BULL SAS
    Inventors: Xavier Bru, Francois Wellenreiter, Benoit Welterlen
  • METHOD FOR CONFIGURING AN IT SYSTEM, CORRESPONDING COMPUTER PROGRAM AND IT SYSTEM
    Publication number: 20130067482
    Abstract: A method designed to configure an IT system having at least one computing core for executing instruction threads, in which each computing core is capable of executing at least two instruction threads at a time in an interlaced manner, and an operating system, being executed on the IT system, capable of providing instruction threads to each computing core. The method includes a step of configuring the operating system being executed in a mode in which it provides each computing core with a maximum of one instruction thread at a time.
    Type: Application
    Filed: March 10, 2011
    Publication date: March 14, 2013
    Inventors: Xavier Bru, Philippe Garrigues, Benoît Welterlen