Abstract: This method of processing data protected by a coding is particularly suitable to be used in microcircuit cards utilizing the method of processing data of the DES type. In the DES method, a step SP of transformation of compression S is included, which is followed by an irregular permutation P. According to the method, the transformation of compression S is effected in such a manner that the data to be stored are subjected beforehand to a permutation P, while a masking system is calculated specifically to permit the execution of the said step SP by recuperating only the desired bits, the latter then being automatically present at the predetermined storage locations.

Abstract: A method of rotating a word constituted by binary elements b.sub.0 to b.sub.p-1 arranged from a position P(i) to a position P(i+p-1) in a global format containing p+n binary elements arranged according to the positions P(1) to P(p+n), which global format is contained in one or more registers (K0-K7) as elementary formats is performed by a microprocessor (8) for carrying out instructions with respect to the elementary formats of clockwise rotation, counterclockwise rotation and an instruction of transfer of a binary element to a carry register (c), which instructions are stored in a read-only memory.

Abstract: This method of processing data protected by encryption is particularly suitable for smart cards utilizing the DES system. The method enables the execution of the irregular permutation of the key on the basis of a correspondence table, which operation is most costly as regards processing time and code length in the cited system. The method involves the decomposition of the initial permutation into a plurality of elementary permutations so that the majority thereof is performed on at least two bits, the bits of the various octets of the key being marked, a masking system being applied in order to extract the appropriate bits for their permutation in the positions predetermined by the correspondence table.

Abstract: A monolithically integrated resistive attenuator is autobiased from an input bipolar signal the amplitude of which is higher than the integrated circuit voltage supplies. The resistive attenuator is arranged in a first pocket formed in an epitaxial layer, and is connected between the input bipolar signal and ground. An intermediate tap produces an output signal. A diode and capacitor are formed in a second pocket. The diode is connected between the input bipolar signals and the epitaxial layer while the capacitor is connected between the epitaxial layer and the isolation walls thereof. The positive half-periods of the input bipolar signal charges the capacitor, which in turn biases the epitaxial layers. The attenuator, therefore, can be monolithically integrated into a silicon chip and remain isolated for all values of the input bipolar signal.

Abstract: A circuit for receiving signals from a device connected through a line meeting the requirements of EIA RS232C Standard, comprising a differential amplifier (2) receiving an input signal the amplitude of which is divided by factor k through input network (1). The switching threshold of amplifier (2) is variable and has a first value to ensure switching on the positive slope edge of the input signal and a second value to ensure switching on the negative slope edge. This circuit comprises circuits for detecting the status of the connected device, including a level detector (3) and a decision circuit (4) which, according to the outputs of the receiver and level detector (5), generates a signal indicating the status of the connected device. Integrators (5, 6) are provided for preventing the status indicating signal from changing its level when the input signal goes through zero or receives short noise pulses.