Abstract: A strain of Duganella sp., a polysaccharide produced thereby, and use are provided. The Duganella sp. G3 of the present disclosure has the deposit number of CCTCC NO: M 2024137. The exopolysaccharide TDG3 produced by the strain acts as a TLR4/DC-SIGN dual receptor agonist and significantly reduces body weight upon administration to a subject. The exopolysaccharide TDG3 of the present disclosure may significantly reduce appetite in a subject, decrease food take, lower body weight, and reduce fat mass. It may also alleviate or prevent obesity-induced hepatic steatosis. It is safe and non-toxic, is suitable for use in lipid-lowering and weight-loss drugs, and has good clinical application value and broad application prospects.

Abstract: A method for obtaining a processing path of a workpiece includes: collecting data of the workpiece to obtain a target workpiece point cloud; taking a data point in the target workpiece point cloud whose curvature is greater than a curvature threshold as an initial path point; calculating a target feature of the initial path point based on a normal vector of each initial path point, and if the target feature of the initial path point meets a set condition, taking the initial path point as a target path point; extracting a skeleton line from at least one path point cloud aggregated by target path points; and performing linear fitting on the skeleton line to obtain the processing path of the workpiece.

Abstract: Disclosed in the present invention are a 5-pyridine-1H-indazole compound, a pharmaceutical composition, and a use. The structure of the compound is represented by formula I or II, and also comprised are an isomer or pharmaceutically acceptable salt thereof, or a mixture of said isomer and salt. The compound and the pharmaceutical composition thereof can effectively inhibit the activity of CLK2 and DYRK1A proteins, can be used for preparing drugs for treating osteoarthritis, can show the efficacy at a molecular level, has a more excellent therapeutic effect, and optimally, can reach a nano-molar concentration level. In addition, a preparation method for the compound is simple, convenient and easy to operate.

Abstract: Disclosed are a pyrido ring compound, a preparation method therefor, an intermediate, a composition, and an application. The pyrido ring compound has a structure as shown in formula I, has JAK inhibitory activity, and can be used for treating JAK-related diseases, such as autoimmune diseases or cancers.

Abstract: This invention relates generally to the field of virus detection. In particular, the invention provides kits, probes, primers, kits and methods for amplifying and detecting sequences selected from the group comprising COIN-CoV2-241, COIN-CoV2-3037, COIN-CoV2-14408, COIN-CoV2-28144, COIN-CoV2-23403, COIN-CoV2-28881, COIN-CoV2-28882, COIN-CoV2-28883, COIN-CoV2-17747, COIN-IFA-238 and COIN-IFB-002 in samples from co-infection of SARS-CoV-2, influenza A virus (IFA) and/or influenza B virus (IFB). The clinical and other uses of the present kits, probes, primers, kits and methods are also contemplated.

Abstract: This document describes systems, methods, and apparatus for determining a time budget for transcoding a video. By calculating and/or monitoring the time budget in accordance with the teachings hereof, a transcoder can assess the effect its transcode duration will have on a client buffer. As a result the transcoder may adjust its processing of the video. The teachings hereof are applicable, without limitation, to the transcoding of live video.

Abstract: A Biphase Mark Coding (BMC) transceiver is provided. In the BMC transceiver, an operational amplifier operating in a time division multiplexing manner is used. The operational amplifier is configured as a unity gain buffer, and it is determined whether the BMC transceiver operates as a transmitter or a receiver by selecting different input switches and output switches. In a transmitting mode, a bias current of an input differential pair transistor of the operational amplifier is changed, to change a slew rate, so as to obtain an output waveform with adjustable rising/falling edges of the transmitter.

Abstract: A bidirectional signal conditioning chip for a USB Type-C cable and a USB Type-C cable are provided. The chip includes a memory, a processor and a transfer driver. The transfer driver is configured to regenerate and transmit a high speed signal; the memory is configured to store a program code; the processor is configured to call the program code, and perform the following operations when the program code is executed: determining a data transmission direction and a type supported by transmitted data of the USB Type-C cable; configuring on-off states of buffers in the transfer driver based on the data transmission direction and the supported type, so that a data output direction of the transfer driver is consistent with the data transmission direction.

Abstract: A biphase mark coding transmitter is provided. In the biphase mark coding transmitter, a delay control unit performs equal-interval delay processing on data transmitted by a data coding and protocol processing unit. Then, the current-steering digital-to-analog converter is controlled to charge or discharge a resistance-capacitance circuit to obtain an accurately-controlled conversion time. Data with the controlled conversion time is driven to a CC by a unity-gain buffer to generate an output waveform. The technical solution solves the technical problem of a mutual influence between power source systems of a traditional BMC transmitter which is a digital module and a traditional BMC receiver which is an analog module, and the technical problem of a large noise of a power switch and large consumption of chip area and power which are resulted from digital buffers driven by equal-interval data or clocks in a traditional BMC transmitter.

Abstract: This document describes systems, methods, and apparatus for determining a time budget for transcoding a video. By calculating and/or monitoring the time budget in accordance with the teachings hereof, a transcoder can assess the effect its transcode duration will have on a client buffer. As a result the transcoder may adjust its processing of the video. The teachings hereof are applicable, without limitation, to the transcoding of live video.

Abstract: A bidirectional signal conditioning chip for a USB Type-C cable and a USB Type-C cable are provided. The chip includes a memory, a processor and a transfer driver. The transfer driver is configured to regenerate and transmit a high speed signal; the memory is configured to store a program code; the processor is configured to call the program code, and perform the following operations when the program code is executed: determining a data transmission direction and a type supported by transmitted data of the USB Type-C cable; configuring on-off states of buffers in the transfer driver based on the data transmission direction and the supported type, so that a data output direction of the transfer driver is consistent with the data transmission direction.

Abstract: The termination resistor calibration circuit and a control method thereof are provided. The resistance of the termination resistor of the CML transmitter is directly calibrated, so that the error caused by duplicating the resistor can be avoided, which improves the calibration accuracy. In addition, no duplicated resistor and constant current source is required, which reduces the area occupied by the circuit. Further, the absolute current and the relative current are obtained from the bandgap module and thus have high accuracy. The output signal control module, the constant current source, and the termination resistors of the CML transmitter can be used for transmitting signals after the resistance calibration is finished, which improves the utilization of the circuit module.

Abstract: A clock and data recovery circuit and a phase interpolator therefor are provided. The clock and data recovery circuit includes a phase-locked loop, a control unit and the phase interpolator, a receiving circuit, a serial-to-parallel conversion circuit. The phase interpolator is connected with the control unit of the clock and data recovery circuit, and the phase interpolator includes: an encoding circuit, two multiplexers, a clock mixer, and two differential to single-ended amplifiers. The control unit is configured to further control the encoding circuit to change a delay position for a clock outputted by the phase interpolator in a case that the data sampled in the current clock position is not the optimal sampled data, to lead or lag the clock, thereby forming a stable state in which the clock follows the data dynamically.

Abstract: A clock and data recovery circuit and a phase interpolator therefor are provided. The clock and data recovery circuit includes a phase-locked loop, a control unit and the phase interpolator, a receiving circuit, a serial-to-parallel conversion circuit. The phase interpolator is connected with the control unit of the clock and data recovery circuit, and the phase interpolator includes: an encoding circuit, two multiplexers, a clock mixer, and two differential to single-ended amplifiers. The control unit is configured to further control the encoding circuit to change a delay position for a clock outputted by the phase interpolator in a case that the data sampled in the current clock position is not the optimal sampled data, to lead or lag the clock, thereby forming a stable state in which the clock follows the data dynamically.

Abstract: Error control in multi-stream visual dynamic range (VDR) codecs is described, including for a case of a layer-decomposed (non-backward compatible) video codecs. Error control can be provided by concealing lost and/or corrupted data in data frames of a decoded VDR bitstream prior to rendering a corresponding VDR image. Various algorithms and methods for concealing lost and/or corrupted data are provided.

Abstract: Error control in multi-stream visual dynamic range (VDR) codecs is described, including for a case of a layer-decomposed (non-backward compatible) video codecs. Error control can be provided by concealing lost and/or corrupted data in data frames of a decoded VDR bitstream prior to rendering a corresponding VDR image. Various algorithms and methods for concealing lost and/or corrupted data are provided.

Abstract: Disclosed is a heat roller control device comprising a high temperature malfunction detection unit configured to receive a temperature value detected by a heat roller temperature sensor; an electrical power control unit configured to cut off, when receiving a high temperature malfunction detection signal, power feeding to a heat roller from an electrical power unit; an analog-to-digital converter configured to periodically convert plural of the temperature values from the heat roller temperature sensor to plural digital temperature values; a temperature value storage unit configured to receive and store the plural digital temperature values from the analog-to-digital converter; a temperature value processing unit configured to read and process the plural digital temperature values stored in the temperature value storage unit; and a high temperature malfunction determination unit configured to receive the processed data, and then based on the processed data, determine whether high temperature malfunction occur

Abstract: A method of efficiently adjusting a timeline in a time window. An application program displays a window that includes a graphical user interface (GUI), at least a portion of time-based data, a timeline, and a slider bar. If a click and drag occurs while a cursor is over the slider bar, the application moves the slider bar and changes a position of data displayed in the window by an amount corresponding to the movement. The application increases the timeline scale if the slider bar reaches an edge of the timeline. If a click and drag occurs while the cursor is over a handle on an edge of the slider bar, the application resizes the slider bar and adjusts the timeline scale to correspond to the slider bar scale. If additional time-based data is available and is not displayed, the application displays an indicator on a corresponding edge of the timeline.

Abstract: A system for lossless sequence of events data streaming in a scan based process control system is provided. The system comprises a digital interface component, the digital interface component configured to receive a plurality of sequence of events data collected during one scan period, to produce a sequence of events data buffer comprising a plurality of sequence of events data, and to make the sequence of events data buffer available to at least one system component. The digital interface component comprises a storage component, the storage component configured to store a sequence of events data buffer. The system further comprises a processing component that accesses the sequence of events data from the storage component and processes the sequence of events data.

Abstract: Disclosed is a heat roller control device comprising a high temperature malfunction detection unit configured to receive a temperature value detected by a heat roller temperature sensor; an electrical power control unit configured to cut off, when receiving a high temperature malfunction detection signal, power feeding to a heat roller from an electrical power unit; an analog-to-digital converter configured to periodically convert plural of the temperature values from the heat roller temperature sensor to plural digital temperature values; a temperature value storage unit configured to receive and store the plural digital temperature values from the analog-to-digital converter; a temperature value processing unit configured to read and process the plural digital temperature values stored in the temperature value storage unit; and a high temperature malfunction determination unit configured to receive the processed data, and then based on the processed data, determine whether high temperature malfunction occur