Abstract: Implementations include providing, by a computer-executed migration advisor executing within a run-time of a source database system, a query data set including queries processed by the source database system during production use of the source database system, providing, by the migration advisor, an object data set including data representative of database objects stored within a database of the source database system, generating, by the migration advisor, a list of query-level features and a list of object-level features, each feature in the list of query-level features and each feature in the list of object-level features including a feature that is deprecated in a target database system, resolving one or more issues represented by features of one or more of the list of query-level features and the list of object-level features, and executing migration of the database of the source database system to the database of the target database system.

Abstract: Embodiments of contact structures of a three-dimensional memory device and fabrication method thereof are disclosed. The three-dimensional memory structure includes a film stack disposed on a substrate, wherein the film stack includes a plurality of conductive and dielectric layer pairs, each conductive and dielectric layer pair having a conductive layer and a first dielectric layer. The three-dimensional memory structure also includes a staircase structure formed in the film stack, wherein the staircase structure includes a plurality of steps, each staircase step having two or more conductive and dielectric layer pairs. The three-dimensional memory structure further includes a plurality of coaxial contact structures formed in a first insulating layer over the staircase structure, wherein each coaxial contact structure includes one or more conductive and insulating ring pairs and a conductive core, each conductive and insulating ring pair having a conductive ring and an insulating ring.

Abstract: A coating fabrication method includes providing engineered granules and thermally consolidating the engineered granules on a substrate to form a silicate-resistant barrier coating. Each of the engineered granules is an aggregate of at least one refractory matrix region and at least one calcium aluminosilicate additive region (CAS additive region) attached with the at least one refractory matrix region. In the thermal consolidation, the refractory matrix region from the engineered granules form grains of a refractory matrix of the silicate-resistant barrier coating and the CAS additive region from the engineered granules form CAS additives that are dispersed in grain boundaries between the grains.

Abstract: A method implemented by an access node includes transmitting, by the access node, a wake up signal (WUS) prior to a control channel occurring within an associated discontinuous reception (DRX) ON period, wherein the WUS is transmitted using a first beam, and transmitting, by the access node, the control channel during the associated DRX ON period, wherein the control channel is transmitted on a control resource set (CORESET) using a second beam, wherein the first and second beams share a common quasi-colocated (QCL) source.

Abstract: Systems and methods are described for managing charging and discharging of battery packs. In one or more aspects, a system and method are provided to minimize overcharging of battery cells of specific battery chemistries while still enabling fast charging cycles. In other aspects, a buck converter may be used to reduce a voltage of power used to charge the cells. In further aspects, a fast overcurrent protection circuit is described to address situations involving internal short circuits of a battery cell or battery pack. In yet further aspects, a bypass circuit is provided in series-connected battery packs to improve the charging of undercharged battery packs while also increasing the efficiency of the overall charging process. In other aspects, a circuit is provided that permits a controller to determine a configuration of battery packs.

Abstract: A motor packing and mounting mechanism for a motor in a no larger than medium-sized appliance, such as wet and dry vacuum cleaner, a water aspirator, a water pump, or a humidifier, includes a motor seat supporting a motor in a housing so that the motor is axially disposed between the housing and the motor seat. At least one isolating cover is located inside the housing. A motor chamber for receiving the motor is defined among the housing, the motor seat, and the isolating cover. An axial mating clearance is defined between the isolating cover and the motor seat. A first seal is located and axially-mated in the axial mating clearance, the first seal having an elastic supporting portion. A cross section of the elastic supporting portion has a door-shaped structure, with the elastic supporting portion defining an opening facing an axial direction of the motor.

Abstract: The present application belongs to a technical field of modifying natural polymer materials, provides a high-viscosity lithium carboxymethyl cellulose and preparation method therefor and application thereof. Raw materials are fed into a reactor, and the high-viscosity lithium carboxymethyl cellulose is prepared through an alkalization reaction, an etherification reaction, an acidification reaction and a substitution reaction. The prepared high-viscosity lithium carboxymethyl cellulose can be used for preparing a negative electrode plate of a lithium-ion battery. Compared with the existing lithium carboxymethyl cellulose, the high-viscosity lithium carboxymethyl cellulose provided by the present application can not only reduce an application amount in preparing a negative electrode plate of a lithium-ion battery so as to save a using cost, but also promote an electrochemical performance of the material in combination with a sodium lignin sulfonate.

Abstract: In certain aspects, a memory device includes an array of memory cells and a plurality of peripheral circuits coupled to the array of memory cells. The peripheral circuits include a first peripheral circuit including a recess gate transistor. The peripheral circuits also include a second peripheral circuit including a flat gate transistor.

Abstract: A method for manufacturing a semiconductor structure includes: providing a base; forming multiple discrete first mask layers on the base; forming multiple sidewall layers, in which each sidewall layer is configured to encircle one of the first mask layers, and each sidewall layer is connected to closest sidewall layers, the side walls, away from the first mask layers, of multiple connected sidewall layers define initial first vias and each of the initial first vias is provided with chamfers; removing the first mask layers, and each sidewall layer defines a second via; after removing the first mask layers, forming repair layers which are located on the side walls, away from the second vias, of the sidewall layers and fill the chamfers of the initial first vias to form first vias; and etching the base along the first vias and the second vias to form capacitor holes on the base.

Abstract: In certain aspects, a method for forming a three-dimensional (3D) memory device is disclosed. A first semiconductor structure including an array of NAND memory strings is formed on a first substrate. A second semiconductor structure including a recess gate transistor is formed on a second substrate. The recess gate transistor includes a recess gate structure protruding into the second substrate. The first semiconductor structure and the second semiconductor structure are bonded in a face-to-face manner, such that the array of NAND memory strings is coupled to the recess gate transistor across a bonding interface.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a first semiconductor layer, an array of NAND memory strings, and a first peripheral circuit of the array of NAND memory strings. Sources of the array of NAND memory strings are in contact with a first side of the first semiconductor layer. The first peripheral circuit includes a first transistor in contact with a second side of the first semiconductor layer opposite to the first side. The second semiconductor structure includes a second semiconductor layer and a second peripheral circuit of the array of NAND memory strings. The second peripheral circuit includes a second transistor in contact with the second semiconductor layer.

Abstract: A throwing position acquisition method and apparatus, a computer device, and a storage medium. The method includes: acquiring image frames of a target video; acquiring a projectile position in each image frame; acquiring a trajectory starting point position of the target object based on the projectile position in each image frame; acquiring, based on projectile positions corresponding to at least one group of image frames in the image frames, a first height value corresponding to a case that the target object is thrown; and acquiring a throwing position of the target object based on the first height value and the trajectory starting point position of the target object.

Abstract: Three-dimensional (3D) memory devices and methods for forming the same are disclosed. In certain aspects, a stack structure includes interleaved dielectric layers and conductive layers, a channel structure extending in the stack structure, and a doped semiconductor layer arranged on the stack structure. The doped semiconductor layer covers an end of the channel structure and the stack structure, the channel structure includes a channel layer, and the channel layer includes a doped channel layer.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes an array of memory cells, a first peripheral circuit of the array of memory cells, and a polysilicon layer between the array of memory cells and the first peripheral circuit. The first peripheral circuit includes a first transistor. The second semiconductor structure includes a second peripheral circuit of the array of memory cells. The second peripheral circuit includes a second transistor.

Abstract: A system for combined production of yellow phosphorous and syngas is disclosed. The air separation unit, the pulverized coal preparation unit and the mineral aggregate forming unit are respectively connected to a gas inlet and a top feeding port of the phosphorus coal gasifier; phosphorus-containing syngas obtained from phosphorus coal gasifier is connected to a gas inlet of the separating washing unit through an outlet of the phosphorous coal gasifier; Yellow phosphorus products and crude syngas are respectively output from the output port of the separating washing unit; and then the crude syngas is purified to obtain refined syngas. A slag discharge port at the bottom of the phosphorus coal gasifier is connected to an input port of a slag cold quenching unit. The system can improve the available energy of yellow phosphorous production, the production capacity of yellow phosphorus and the yield of syngas, and reduce CO2 emission.

Abstract: Three-dimensional (3D) memory devices and methods for forming the same are disclosed. In certain aspects, a 3D memory device includes a first semiconductor assembly, a second semiconductor assembly, and an inter-assembly bonding layer between the first semiconductor assembly and the second semiconductor assembly. The first semiconductor assembly includes a first array structure and a first periphery structure. The first array structure includes a first memory stack having a plurality of interleaved stack conductive layers and stack dielectric layers. The first periphery structure includes a plurality of first peripheral circuits electrically connected to the first memory stack. The second semiconductor assembly includes a second array structure and a second periphery structure. The second array structure includes a second memory stack having a plurality of interleaved stack conductive layers and stack dielectric layers.

Abstract: A three-dimensional (3D) memory device includes a first semiconductor structure and a second semiconductor structure. A first semiconductor structure includes a first substrate, and a memory array structure disposed on the first substrate. The second semiconductor structure is disposed over the first semiconductor structure, and the second semiconductor structure includes a second substrate, and a peripheral device in contact with the second substrate. The second substrate is formed between the peripheral device and the first semiconductor structure.

Abstract: In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first and the second semiconductor structures. The first semiconductor structure includes an array of NAND memory strings, a first peripheral circuit of the array of NAND memory strings including a first transistor, a polysilicon layer between the array of NAND memory strings and the first peripheral circuit, and a first semiconductor layer in contact with the first transistor. The polysilicon layer is in contact with sources of the array of NAND memory strings. The second semiconductor structure includes a second peripheral circuit of the array of NAND memory strings including a second transistor, and a second semiconductor layer in contact with the second transistor. The second semiconductor layer is between the bonding interface and the second peripheral circuit.

Abstract: Sorbent materials comprising a nanofiber composite including a polymeric material defining a continuous phase and at least one metal organic framework (MOF) material defining a discontinuous phase are provided. The at least one MOF material is dispersed throughout the continuous phase of the polymeric material. Fibrous mats comprising the sorbent materials are also provided. Water harvesting devices utilizing the sorbent materials are also provided.