Abstract: A system for heterogeneous computing is disclosed. An example system includes crossbars, a photonic interconnect, and photonic computing circuitry. The crossbars include a first crossbar configured to perform matrix-vector multiplications and silicon photonic circuitry configured to perform matrix-vector multiplications. The photonic interconnect is configured to route signals, via routing paths, between crossbars of the plurality of crossbars. The photonic computing circuitry is integrated within the photonic interconnect. The photonic computing circuitry is configured to route signals via routing paths and perform pre-processing and post-processing of signals from the crossbars of the plurality of crossbars.

Abstract: Examples of the present technology provide heterogeneous (i.e., multi-chip) ASIC-memristor integrations that enable high voltage-dependent precision memristor programming while preserving optimal ASIC performance/capabilities. Examples achieve these advantages by “de-coupling” memristor hardware from ASIC chip. Accordingly, a heterogeneous ASIC-memristor integration of the present technology may comprise an ASIC chip packaged onto a functional “memristor-interposer” chip. The memristor interposer may serve both a functional and structural purpose. Namely, memristors of the memristor interposer can be leveraged in conjunction with the ASIC for processing/computation functions—while connections within the memristor interposer route signals between ASIC and computing system (e.g., between the ASIC and a printed circuit board).

Abstract: The present invention relates to the technical field of molecular biology, and in particular, to a sgRNA sequencing linker and use thereof.

Abstract: Examples of the present technology provide heterogeneous (i.e., multi-chip) ASIC-memristor integrations that enable high voltage-dependent precision memristor programming while preserving optimal ASIC performance/capabilities. Examples achieve these advantages by “de-coupling” memristor hardware from ASIC chip. Accordingly, a heterogeneous ASIC-memristor integration of the present technology may comprise an ASIC chip packaged onto a functional “memristor-interposer” chip. The memristor interposer may serve both a functional and structural purpose. Namely, memristors of the memristor interposer can be leveraged in conjunction with the ASIC for processing/computation functions—while connections within the memristor interposer route signals between ASIC and computing system (e.g., between the ASIC and a printed circuit board).

Abstract: Disclosed are a method and a device for constructing an antibody complementarity determining region (CDR) library. Also disclosed are a method, a device and a computer program product for determining the occurrence frequency of member sequences of an antibody CDR library, by means of which an antibody CDR library with a specific amino acid distribution at one or more positions can be obtained.

Abstract: The present disclosure generally relates to a DNA construct design system. An exemplary method comprises, at an electronic device, receiving an input selecting a vector backbone, wherein the vector backbone comprises a plurality of functional parts; in response to receiving the input selecting the vector backbone, displaying a graphical representation of the vector backbone; receiving an input selecting one or more functional parts of the plurality of functional parts of the vector backbone; after receiving the input selecting one or more functional parts on the vector backbone, receiving a drag-and-drop input comprising an indication of a functional part; in response to receiving the drag-and-drop input, updating the vector backbone based on the functional part indicated in the drag-and-drop input and the selected one or more functional parts of the plurality of functional parts of the vector backbone; and displaying a graphical representation of the updated vector backbone.

Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.

Abstract: A memristor device includes a first electrode, a second electrode, and a memristor layer disposed between the first electrode and the second electrode. The memristor layer is formed of a metal oxide. The memristor layer includes a plurality of regions that extend between the first electrode and the second electrode. The plurality of regions of the memristor layer are created with different concentrations of oxygen before electrical operation, and, during electrical operation, a voltage-conductance characteristic of the memristor device is controlled based on the different concentrations of oxygen of the plurality of regions. The controlling of the voltage-conductance characteristic includes increasing or decreasing the conductance of the memristor device toward a target conductance at a specific voltage.

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

Abstract: One example includes a resistive random access memory (ReRAM) device. The device includes a set of electrodes to receive a voltage. The device also includes a memristor element to at least one of store and readout a memory state in response to a current that flows through the ReRAM device in response to the voltage. The device further includes a selector element having a dynamic current-density area with respect to the voltage.

Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.

Abstract: Provided are a method and device for adjusting a frame rate of video recording. According to the method, data collected by a sensor of a terminal is acquired; state information is determined according to the acquired data, wherein the state information is used for adjusting a frame rate of video recording of the terminal; the frame rate of video recording of the terminal is adjusted according to the determined state information, thereby reducing the power consumption of the terminal. The technical solution solves the problem in related art of additional power consumption because the frame rate of video recording is dynamically adjusted based on features of an image frame, reduces the power consumption of a video recording function, and improves the endurance capability of the terminal.

Abstract: A resistive memory device includes a conductor and a resistive memory stack in contact with the conductor. The resistive memory stack includes a multi-component electrode and a switching region. The multi-component electrode includes a base electrode having a surface, and an inert material electrode on the base electrode surface in a form of i) a thin layer, or ii) discontinuous nano-islands. A switching region is in contact with the conductor and with the inert material electrode when the inert material electrode is in the form of the thin layer; or the switching region is in contact with the conductor, with the inert material electrode, and with an oxidized portion of the base electrode when the inert material electrode is in the form of the discontinuous nano-islands.

Abstract: Provided are a method and device for adjusting a frame rate of video recording. According to the method, data collected by a sensor of a terminal is acquired; state information is determined according to the acquired data, wherein the state information is used for adjusting a frame rate of video recording of the terminal; the frame rate of video recording of the terminal is adjusted according to the determined state information, thereby reducing the power consumption of the terminal. The technical solution solves the problem in related art of additional power consumption because the frame rate of video recording is dynamically adjusted based on features of an image frame, reduces the power consumption of a video recording function, and improves the endurance capability of the terminal.

Abstract: A reflective color display has at least a color pixel disposed to receive ambient light for front lighting and has a light source optically coupled to the color pixel to provide back light for backlighting. The color pixel has a first sub-pixel and a second sub-pixel. The first sub-pixel has a first luminescent layer with a luminescent material for converting a portion of the ambient light spectrum into light of a first color. An unpatterned mirror is disposed under the luminescent layer of the first sub-pixel and extends through the first and second sub-pixels. The unpatterned mirror reflects at least light of the first color while transmitting the back light to the first luminescent layer for conversion by the first luminescent material into light of the first color.

Abstract: An example of the memristor includes a bottom electrode, a switchable material positioned on the bottom electrode, and a cured negative or positive resist that forms an interlayer dielectric positioned on the switchable material. An open area is formed in the interlayer dielectric. The open area exposes a surface of the switchable material. A top electrode is positioned in contact with the exposed surface of the switchable material at the open area.

Abstract: A resistive memory device includes a bottom electrode and a top electrode sandwiching a switching layer. The device also includes a field enhancement (FE) feature that extends from the bottom electrode either into the switching layer or is covered by switching layer and that is to enhance an electric field generated by the two electrodes to thereby confine a switching area of the device at the FE feature. The device further includes a planar interlayer dielectric surrounding the device, for supporting the top electrode. A method of making a resistive memory device, employing in-situ vacuum deposition of all layers, is also provided.

Abstract: A reflective color display pixel has a top surface for receiving ambient light, and a plurality of sub-pixels including a first sub-pixel and a second sub-pixel. The first sub-pixel has a luminescent layer for absorbing a portion of the ambient light and emitting light of a first color. The second sub-pixel has a color tunable reflector for reflecting the ambient light in a selected band.

Abstract: An assembly corresponding to a pixel includes sub-assemblies that each correspond to a sub-pixel of the pixel. At least one of the sub-assemblies includes a luminescent fluid, black particles and a mirror. The luminescent fluid converts wavelengths of light less than a conversion wavelength of the sub-assembly to the conversion wavelength. The black particles are positionable within luminescent fluid in accordance with a color to be displayed by the assembly. The mirror is disposed at a bottom end of the sub-assembly.

Abstract: A display includes at least two stacked waveguides (110) and (120). A first waveguide (110) contains first luminophores that fluoresce to produce light of a first color. A second waveguide (120) overlying the first waveguide and contains second luminophores that fluoresce to produce light of a second color. A light collection structure (180) transmits light from a surrounding environment transversely through the first and second waveguides (110, 120) and optical vias (172, 174) provide optical paths out of the display for light respectively from the first optical waveguide (110) and the second optical waveguide (120).