Patents by Inventor Xiahong CHENG

Xiahong CHENG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210125873
    Abstract: The disclosure provides a method for fabricating a semiconductor device, in which a core device of the semiconductor device employs a stacked nanowires or nanosheets structure, and an input/output device of the semiconductor device employs FinFET structure. The disclosure also provides a FinFET with an input/output device compatible with the stacked nanowires or nanosheets. The solution of the disclosure solves the problem that if the input/output device employs stacked nanowires or nanosheets device, it is difficult to fill a metal gate between two nanowires or nanosheets due to the thicker dielectric layer, and even if the metal gate is filled partially, the electrical performance of the input/output device is still poor.
    Type: Application
    Filed: July 8, 2020
    Publication date: April 29, 2021
    Inventors: Yongliang LI, Hong YANG, Xiahong CHENG, Xiaolei WANG, Xueli MA, Wenwu WANG