Abstract: The disclosure provides a thin film transistor, a method of manufacturing the thin film transistor, an array substrate and a display device, belongs to the field of display technology, and can solve the problem that an existing thin film transistor is prone to cracking or breaking due to bending. The thin film transistor of the present disclosure includes a substrate and an active layer arranged on the substrate, and at least one groove is arranged on a surface of the active layer distal to the substrate.

Abstract: A thin film transistor, a method for manufacturing the same and a display device are disclosed. The thin film transistor includes source-drain electrodes and a passivation layer; an isolation layer is disposed between the source-drain electrodes and the passivation layer, and the isolation layer overlays the source-drain electrodes.

Abstract: A thin film transistor, a method for manufacturing the same and a display device are disclosed. The thin film transistor includes source-drain electrodes and a passivation layer; an isolation layer is disposed between the source-drain electrodes and the passivation layer, and the isolation layer overlays the source-drain electrodes.

Abstract: The disclosure provides a thin film transistor, a method of manufacturing the thin film transistor, an array substrate and a display device, belongs to the field of display technology, and can solve the problem that an existing thin film transistor is prone to cracking or breaking due to bending. The thin film transistor of the present disclosure includes a substrate and an active layer arranged on the substrate, and at least one groove is arranged on a surface of the active layer distal to the substrate.

Abstract: A display substrate and a fabrication method thereof, and a display device are disclosed. The fabrication method of a display substrate, includes forming a first gate electrode on a transparent base substrate; forming a transparent gate insulating layer on the first gate electrode; forming a transparent active layer on the transparent gate insulating layer; forming a transparent source electrode and a transparent drain electrode on the transparent active layer, wherein, the transparent source electrode and the transparent drain electrode do not overlap with the first gate electrode in a thickness direction of the transparent base substrate.

Abstract: The present disclosure discloses in embodiments a thin film transistor and a manufacturing method thereof, an array substrate. The thin film transistor comprises: a base substrate, an active layer, a source, a gate, and a drain. Two ends of the active layer are connected to the source and the drain, respectively. The gate comprises a top gate and a bottom gate arranged opposite to each other in a direction perpendicular to the base substrate, the top gate comprising a top gate top portion and a top gate side portion connected to the top gate top portion, the top gate side portion extending from the top gate top portion towards the base substrate. The active layer is sandwiched between the top gate top portion and the bottom gate. A sidewall of the active layer is at least partially surrounded by the top gate side portion.

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.

Abstract: The present disclosure provides a TFT, a manufacturing method thereof, an array substrate and a display device. The TFT includes an N-type metal oxide TFT and a P-type metal oxide TFT. The manufacturing method includes a step of forming an active layer of the N-type metal oxide TFT and an active layer of a P-type metal oxide TFT on a base substrate through a single patterning process.

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display device are provided. The thin film transistor comprises a copper gate, a gate insulating layer, an active layer, a source, and a drain. The thin film transistor further comprises a copper alloy layer which is arranged on a side of the gate facing the active layer.

Abstract: The present disclosure discloses in embodiments a thin film transistor and a manufacturing method thereof, an array substrate. The thin film transistor comprises: a base substrate, an active layer, a source, a gate, and a drain. Two ends of the active layer are connected to the source and the drain, respectively. The gate comprises a top gate and a bottom gate arranged opposite to each other in a direction perpendicular to the base substrate, the top gate comprising a top gate top portion and a top gate side portion connected to the top gate top portion, the top gate side portion extending from the top gate top portion towards the base substrate. The active layer is sandwiched between the top gate top portion and the bottom gate. A sidewall of the active layer is at least partially surrounded by the top gate side portion.

Abstract: A display substrate and a fabrication method thereof, and a display device are disclosed. The fabrication method of a display substrate, includes forming a first gate electrode on a transparent base substrate; forming a transparent gate insulating layer on the first gate electrode; forming a transparent active layer on the transparent gate insulating layer; forming a transparent source electrode and a transparent drain electrode on the transparent active layer, wherein, the transparent source electrode and the transparent drain electrode do not overlap with the first gate electrode in a thickness direction of the transparent base substrate.

Abstract: The present invention provides a thin film transistor comprising an active layer, the active layer has a superlattice structure, and comprises a plurality of semiconductor layers and an insulating layer between every two adjacent semiconductor layers, a thickness of each of the semiconductor layers and the insulating layers is in nanometer range, and the plurality of semiconductor layers are made of at least one of metal oxide semiconductor and metal nitride oxide semiconductor. The present invention further provides an array substrate and a manufacturing method thereof, and a display device. The thin film transistor has excellent electrical characteristics and reliability, such as higher carrier mobility, lower turn-off leak current and better stability of threshold voltage.

Abstract: An embodiment of the present invention discloses a 3D barrier substrate and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.

Abstract: The present invention provides an array substrate of LCD display and a manufacturing method thereof, the array substrate comprises a transparent substrate, gate lines and data lines which are disposed on the transparent substrate, wherein the array substrate further comprises: a transparent conducting bar and a gate short-circuit bar which are disposed on the transparent substrate, said transparent conducting bar is disposed below said gate short-circuit bar, said gate short-circuit bar and said data lines are arranged in a same layer. The present invention can avoid the problem of burning the gate short-circuit bar due to the occurrence of static discharge, the electrical defects in the array substrate can be normally detected and repaired in the array test process, thus the qualified product rate of the array substrate of LCD display is improved.

Abstract: According to one aspect of the present invention, the provided is an array substrate. Specifically, the first conductive strip that is coupled to the first data shorting bar and the second conductive strip that is coupled to the second data shorting bar are formed on the array substrate. The width of the first conductive strip is greater than the width of the first data shorting bar. The width of the second conductive strip is greater than the width of the second data shorting bar. The first conductive strip is overlapped with the second conductive strip. Such a structure of the array substrate effectively increases the overlapped capacitance between the data metal layer and the gate metal layer.

Abstract: An embodiment of the present invention discloses a 3D barrier substrate o and a method for manufacturing the same, and a display device in order to improve the utilization of facilities, increase the production efficiency, and decrease the cost of production. The method of manufacturing 3D barrier substrate comprises: forming a transparent electrode thin film on a substrate, and forming a passivation layer on the transparent electrode thin film; forming an transparent electrode and a passivation layer via hole by a patterning process, wherein the via hole is used for coupling the transparent electrode to the signal line; and forming a signal line, wherein the signal line is coupled to the transparent electrode through the via hole.

Abstract: According to one aspect of the present invention, the provided is an array substrate. Specifically, the first conductive strip that is coupled to the first data shorting bar and the second conductive strip that is coupled to the second data shorting bar are formed on the array substrate. The width of the first conductive strip is greater than the width of the first data shorting bar. The width of the second conductive strip is greater than the width of the second data shorting bar. The first conductive strip is overlapped with the second conductive strip. Such a structure of the array substrate effectively increases the overlapped capacitance between the data metal layer and the gate metal layer.

Abstract: The present invention relates to an array substrate for an LCD display and manufacturing method. The array substrate comprise a transparent substrate, gate lines and data lines disposed on the transparent substrate, a transparent conducting bar and a gate short-circuit bar. The transparent conducting bar is disposed below the gate short-circuit bar with the gate short-circuit bar and data lines arranged in the same layer. The present invention avoids the problem of burning the gate short-circuit bar due to the occurrence of static discharge and electrical defects in the array substrate are detectable and repairable in the array test process, improving the product rate of the LCD array substrate.