Abstract: A method of forming a semiconductor device by recessing the upper surface of a semiconductor substrate in first and second areas but not a third area, forming a first conductive layer in the first and second areas, forming a second conductive layer in all three areas, removing the first and second conductive layers from the second area and portions thereof from the first area resulting in pairs of stack structures each with a control gate over a floating gate, forming a third conductive layer in the first and second areas, forming a protective layer in the first and second areas and then removing the second conductive layer from the third area, then forming blocks of conductive material in the third area, then etching in the first and second areas to form select and HV gates, and replacing the blocks of conductive material with blocks of metal material.

Abstract: A method of forming a semiconductor device by recessing the upper surface of a semiconductor substrate in first and second areas but not a third area, forming a first conductive layer in the three areas, forming a second conductive layer in all three areas, removing the first and second conductive layers from the second area and portions thereof from the first area resulting in pairs of stack structures each with a control gate over a floating gate, forming a third conductive layer in all three areas, forming a protective layer in the first and second areas and then removing the third conductive layer from the third area, then forming blocks of dummy conductive material in the third area, then etching in the first and second areas to form select and HV gates, and then replacing the blocks of dummy conductive material with blocks of metal material.

Abstract: A method of forming a memory device that includes forming a first polysilicon layer using a first polysilicon deposition over a semiconductor substrate, forming an insulation spacer on the first polysilicon layer, and removing some of the first polysilicon layer to leave a first polysilicon block under the insulation spacer. A source region is formed in the substrate adjacent a first side surface of the first polysilicon block. A second polysilicon layer is formed using a second polysilicon deposition. The second polysilicon layer is partially removed to leave a second polysilicon block over the substrate and adjacent to a second side surface of the first polysilicon block. A third polysilicon layer is formed using a third polysilicon deposition. The third polysilicon layer is partially removed to leave a third polysilicon block over the source region. A drain region is formed in the substrate adjacent to the second polysilicon block.

Abstract: A method of forming a device on a substrate with recessed first/third areas relative to a second area by forming a fin in the second area, forming first source/drain regions (with first channel region therebetween) by first/second implantations, forming second source/drain regions in the third area (defining second channel region therebetween) by the second implantation, forming third source/drain regions in the fin (defining third channel region therebetween) by third implantation, forming a floating gate over a first portion of the first channel region by first polysilicon deposition, forming a control gate over the floating gate by second polysilicon deposition, forming an erase gate over the first source region and a device gate over the second channel region by third polysilicon deposition, and forming a word line gate over a second portion of the first channel region and a logic gate over the third channel region by metal deposition.

Abstract: A memory device, and method of making the same, that includes a substrate of semiconductor material of a first conductivity type, first and second regions spaced apart in the substrate and having a second conductivity type different than the first conductivity type, with a first channel region in the substrate extending between the first and second regions, a first floating gate disposed over and insulated from a first portion of the first channel region adjacent to the second region, a first coupling gate disposed over and insulated from the first floating gate, a first word line gate disposed over and insulated from a second portion of the first channel region adjacent the first region, and a first erase gate disposed over and insulated from the first word line gate.

Abstract: Numerous embodiments are disclosed of improved architectures for storing and retrieving system data in a non-volatile memory system. Using these embodiments, system data is much less likely to become corrupted due to charge loss, charge redistribution, disturb effects, and other phenomena that have caused corruption in prior art non-volatile memory systems.

Abstract: Memory cells formed on upwardly extending fins of a semiconductor substrate, each including source and drain regions with a channel region therebetween, a floating gate extending along the channel region and wrapping around the fin, a word line gate extending along the channel region and wrapping around the fin, a control gate over the floating gate, and an erase gate over the source region. The control gates are a continuous conductive strip of material. First and second fins are spaced apart by a first distance. Third and fourth fins are spaced apart by a second distance. The second and third fins are spaced apart by a third distance greater than the first and second distances. The continuous strip includes a portion disposed between the second and third fins, but no portion of the continuous strip is disposed between the first and second fins nor between the third and fourth fins.

Abstract: A method of forming memory cells, high voltage devices and logic devices on fins of a semiconductor substrate's upper surface, and the resulting memory device formed thereby. The memory cells are formed on a pair of the fins, where the floating gate is disposed between the pair of fins, the word line gate wraps around the pair of fins, the control gate is disposed over the floating gate, and the erase gate is disposed over the pair of fins and partially over the floating gate. The high voltage devices include HV gates that wrap around respective fins, and the logic devices include logic gates that are metal and wrap around respective fins.

Abstract: A method of forming a semiconductor device includes recessing the upper surface of first and second areas of a semiconductor substrate relative to the third area of the substrate, forming a pair of stack structures in the first area each having a control gate over a floating gate, forming a first source region in the substrate between the pair of stack structures, forming an erase gate over the first source region, forming a block of dummy material in the third area, forming select gates adjacent the stack structures, forming high voltage gates in the second area, forming a first blocking layer over at least a portion of one of the high voltage gates, forming silicide on a top surface of the high voltage gates which are not underneath the first blocking layer, and replacing the block of dummy material with a block of metal material.

Abstract: An encoding device according to the disclosure includes a first encoder, which in operation, encodes a low-band signal from a voice or audio input signal to generate a first encoded signal; a decoder, which in operation, decodes the first encoded signal to generate a low-band decoded signal; a second encoder, which in operation, encodes, on the basis of the low-band decoded signal, a high-band signal comprising a band from the voice or audio input signal, the band being higher than that of the low-band signal to generate a high-band encoded signal; an energy calculator, which in operation, calculates an energy of the voice or audio input signal for each subband of a plurality of subbands of the voice or audio input signal to acquire a calculated energy for each subband of the plurality of subbands of the voice or audio input signal, quantizes the calculated energy for each subband of the plurality of subbands of the voice or audio input signal to acquire a quantized band energy for each subband of the plurali