Patents by Inventor Xiang Guan

Xiang Guan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11431571
    Abstract: Configuration management of devices from multiple vendors using a hardware abstraction capability is provided. Abstraction between a high-level representation and vendor specific terminology may assist in translating configuration commands and operational status indicators to a single consistent presentation interface. Information may be obtained from computer devices to represent operational metrics of a corporate network infrastructure. Collected metrics may be translated for consistency across vendors. Similarly, configuration commands may initially be provided without regard to vendor specific syntax. Utilizing the high-level abstracted representation, a user interface representation of operational status (without regard to vendor terminology) may be provided for a heterogenous rack of associated components from at least two different vendors. Collected data may be analyzed to provide predicted failure of components.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: August 30, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Yung-Ching Tseng, Jian-Feng Guo, Ying Guo, Xiang Guan
  • Patent number: 11405267
    Abstract: Systems and methods address automated temporally based configuration management of a procurement/deployment process that may be used at one or more data centers. A set of current configuration attributes and current parameter settings are maintained for a one or more data centers. Information may be obtained from a purchasing system describing a future device. Prior to actual arrival of the future device, the configuration for that future device may be defined. Upon detection of the uniquely identified future device being communicatively coupled to a management network, the previously defined configuration may be applied. Abstraction from a high-level to vendor specific configuration commands may also be incorporated to allow management of devices from multiple vendors.
    Type: Grant
    Filed: January 16, 2019
    Date of Patent: August 2, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Yung-Ching Tseng, Jian-Feng Guo, Ying Guo, Xiang Guan
  • Publication number: 20220210298
    Abstract: The present disclosure relates to the field of optical technologies and provides a camera module and an endoscope. The camera module includes: a connecting base, including a first connecting member and a first circuit board; wherein the first circuit board is installed in the first connecting member; and a camera, including a housing, a second circuit board, a light source assembly, and a lens assembly; wherein the second circuit board, the light source assembly, and the lens assembly are respectively installed in the housing; the housing is removably connected to the first connecting member; the first circuit board and the second circuit board are electrically connected to each other.
    Type: Application
    Filed: June 25, 2021
    Publication date: June 30, 2022
    Inventors: Jiangfan YAN, Juhao CHEN, Zhongkai WANG, Hongquan GUAN, Haijuan ZOU, Xiang ZHENG
  • Publication number: 20200396128
    Abstract: Configuration management of devices from multiple vendors using a hardware abstraction capability is provided. Abstraction between a high-level representation and vendor specific terminology may assist in translating configuration commands and operational status indicators to a single consistent presentation interface. Information may be obtained from computer devices to represent operational metrics of a corporate network infrastructure. Collected metrics may be translated for consistency across vendors. Similarly, configuration commands may initially be provided without regard to vendor specific syntax. Utilizing the high-level abstracted representation, a user interface representation of operational status (without regard to vendor terminology) may be provided for a heterogenous rack of associated components from at least two different vendors. Collected data may be analyzed to provide predicted failure of components.
    Type: Application
    Filed: June 11, 2019
    Publication date: December 17, 2020
    Inventors: Yung-Ching Tseng, Jian-Feng Guo, Ying Guo, Xiang Guan
  • Publication number: 20200228399
    Abstract: Systems and methods address automated temporally based configuration management of a procurement/deployment process that may be used at one or more data centers. A set of current configuration attributes and current parameter settings are maintained for a one or more data centers. Information may be obtained from a purchasing system describing a future device. Prior to actual arrival of the future device, the configuration for that future device may be defined. Upon detection of the uniquely identified future device being communicatively coupled to a management network, the previously defined configuration may be applied. Abstraction from a high-level to vendor specific configuration commands may also be incorporated to allow management of devices from multiple vendors.
    Type: Application
    Filed: January 16, 2019
    Publication date: July 16, 2020
    Inventors: Yung-Ching Tseng, Jian-Feng Guo, Ying Guo, Xiang Guan
  • Patent number: 9444410
    Abstract: A wide-band single-ended-to-differential low-noise amplifier using a push-pull architecture with an input node coupled to the sources of a first PMOS transistor and a first NMOS transistor, a positive output node coupled to the drains of the first PMOS transistor and the first NMOS transistor, a negative output node coupled to the drains of a second PMOS transistor and a second NMOS transistor, and bias circuitry coupled to the gates of the first and second PMOS and first and second NMOS transistors. The source of the first PMOS transistor is coupled to the gate of the second PMOS transistor, the source of the first NMOS transistor is coupled to the gate of the second NMOS transistor, the source of the second PMOS transistor is coupled to a first supply voltage, and the source of the second NMOS transistor is coupled to a second supply voltage.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: September 13, 2016
    Assignee: AltoBeam Inc.
    Inventors: Renjie Zhou, Xiang Guan
  • Publication number: 20160260216
    Abstract: The invention provides a method for quantitative analysis of nuclear medicine brain imaging. The method comprises retrieving a target image, wherein the target image is a brain image as a nuclear medicine image produced from a radiopharmaceutical, then matching the position of a space axis and the size of a voxel of the target image to a standard template by an affine transformation, wherein the standard template comprises a relative position of striatum. The method further comprises selecting the striatum from the target image according to the relative position of the striatum in the standard template and calculating an average value of the striatum, dividing the striatum from the target image and calculating a background value based on a remainder pixel value of the target image, and a specific uptake ratio is calculated based on the average value of the striatum and the background value.
    Type: Application
    Filed: August 6, 2015
    Publication date: September 8, 2016
    Inventors: Tung-Hsin Wu, Bang-Hung Yang, Jhih-Shian Lee, Yu-Xiang Guan
  • Patent number: 8170522
    Abstract: A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: May 1, 2012
    Assignee: SiBeam, Inc.
    Inventors: Xiang Guan, Chinh Huy Doan, Sohrab Emami-Neyestanak
  • Patent number: 7812775
    Abstract: A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.
    Type: Grant
    Filed: September 22, 2006
    Date of Patent: October 12, 2010
    Assignee: California Institute of Technology
    Inventors: Aydin Babakhani, Xiang Guan, Seyed Ali Hajimiri, Abbas Komijani, Arun Natarajan
  • Publication number: 20100231452
    Abstract: A phased array mm-wave device includes a substrate, a mm-wave transmitter integrated onto the substrate configured to transmit a mm-wave signal and/or a mm-wave receiver integrated onto the substrate and configured to receive a mm-wave signal. The mm-wave device also includes a phased array antenna system integrated onto the substrate and including two or more antenna elements. The phased array mm-wave device also includes one or more dielectric lenses. A distributed mm-wave distributed combining tree circuit includes at least two pairs of differential transconductors with regenerative degeneration and accepts at least two differential input signals. Two mm-wave loopback methods measure the phased array antenna patterns and the performance of an integrated receiver transmitter system.
    Type: Application
    Filed: September 22, 2006
    Publication date: September 16, 2010
    Applicant: California Institute of Technology
    Inventors: Aydin Babakhani, Xiang Guan, Seyed Ali Hajimiri, Abbas Komijani, Arun Natarajan
  • Patent number: 7502631
    Abstract: A phased-array receiver is adapted so as to be fully integrated and fabricated on a single silicon substrate. The phased-array receiver is operative to receive a 24 GHz signal and may be adapted to include 8-elements formed in a SiGe BiCMOS technology. The phased-array receiver utilizes a heterodyne topology, and the signal combining is performed at an IF of 4.8 GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC VCO generates 16 different phases of the LO. An integrated 19.2 GHz frequency synthesizer locks the VCO frequency to a 75 MHz external reference. Each signal path achieves a gain of 43 dB, a noise figure of 7.4 dB, and an IIP3 of ?11 dBm. The 8-path array achieves an array gain of 61 dB, a peak-to-null ratio of 20 dB, and improves the signal-to-noise ratio at the output by 9 dB.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: March 10, 2009
    Assignee: California Institute of Technology
    Inventors: Hossein Hashemi, Xiang Guan, Seyed Ali Hajimiri
  • Patent number: 7489194
    Abstract: A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-through capacitance Cf is connected in parallel with the input terminal and the output terminal of the transistor. A load resistance RL is connected to the output terminal. The control terminal of the transistor is biased at a fixed voltage. Part of the transistor noise follows the looped path through the feed-through resistor instead of passing on to the load, which reduces the noise figure of the amplifier. The value of gm, Rf and RL are chosen in a way to keep the input impedance of the amplifier matched to a well-defined signal source impedance.
    Type: Grant
    Filed: December 5, 2006
    Date of Patent: February 10, 2009
    Assignee: California Institute of Technology
    Inventors: Seyed-Ali Hajimiri, Xiang Guan
  • Publication number: 20080113643
    Abstract: A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.
    Type: Application
    Filed: November 9, 2007
    Publication date: May 15, 2008
    Inventors: Xiang Guan, Chinh Huy Doan, Sohrab Emami-Neyestanak
  • Publication number: 20070075779
    Abstract: A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-through capacitance Cf is connected in parallel with the input terminal and the output terminal of the transistor. A load resistance RL is connected to the output terminal. The control terminal of the transistor is biased at a fixed voltage. Part of the transistor noise follows the looped path through the feed-through resistor instead of passing on to the load, which reduces the noise figure of the amplifier. The value of gm, Rf and RL are chosen in a way to keep the input impedance of the amplifier matched to a well-defined signal source impedance.
    Type: Application
    Filed: December 5, 2006
    Publication date: April 5, 2007
    Inventors: Seyed-Ali Hajimiri, Xiang Guan
  • Patent number: 7157972
    Abstract: A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-through capacitance Cf is connected in parallel with the input terminal and the output terminal of the transistor. A load resistance RL is connected to the output terminal. The control terminal of the transistor is biased at a fixed voltage. Part of the transistor noise follows the looped path through the feed-through resistor instead of passing on to the load, which reduces the noise figure of the amplifier. The value of gm, Rf and RL are chosen in a way to keep the input impedance of the amplifier matched to a well-defined signal source impedance.
    Type: Grant
    Filed: December 9, 2003
    Date of Patent: January 2, 2007
    Assignee: California Institute of Technology
    Inventors: Seyed-Ali Hajimiri, Xiang Guan
  • Publication number: 20050227660
    Abstract: A phased-array receiver is adapted so as to be fully integrated and fabricated on a single silicon substrate. The phased-array receiver is operative to receive a 24 GHz signal and may be adapted to include 8-elements formed in a SiGe BiCMOS technology. The phased-array receiver utilizes a heterodyne topology, and the signal combining is performed at an IF of 4.8 GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC VCO generates 16 different phases of the LO. An integrated 19.2 GHz frequency synthesizer locks the VCO frequency to a 75 MHz external reference. Each signal path achieves a gain of 43 dB, a noise figure of 7.4 dB, and an IIP3 of ?11 dBm. The 8-path array achieves an array gain of 61 dB, a peak-to-null ratio of 20 dB, and improves the signal-to-noise ratio at the output by 9 dB.
    Type: Application
    Filed: November 12, 2004
    Publication date: October 13, 2005
    Applicant: California Institute of Technology
    Inventors: Hossein Hashemi, Xiang Guan, Seyed Hajimiri
  • Publication number: 20040124922
    Abstract: A radio-frequency amplifier is provided. The radio-frequency amplifier includes a transistor having an input terminal, an output terminal, a control terminal, and a transconductance gm. A series-connected feed-through resistance Rf and feed-through capacitance Cf is connected in parallel with the input terminal and the output terminal of the transistor. A load resistance RL is connected to the output terminal. The control terminal of the transistor is biased at a fixed voltage. Part of the transistor noise follows the looped path through the feed-through resistor instead of passing on to the load, which reduces the noise figure of the amplifier. The value of gm, Rf and RL are chosen in a way to keep the input impedance of the amplifier matched to a well-defined signal source impedance.
    Type: Application
    Filed: December 9, 2003
    Publication date: July 1, 2004
    Inventors: Seyed-Ali Hajimiri, Xiang Guan