Patents by Inventor Xiang Zhu

Xiang Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090195790
    Abstract: An apparatus for measuring the coordinates of a point on the surface of an object comprises a projection system for projecting a beam of energy onto the surface of the object, a receiving system for receiving reflected beam energy from the target surface, and a detector for detecting the received energy. The projection system comprises a beam expander for expanding the width of the beam, and a focussing device for focussing the projected beam. The position of the reflected beam energy at the detector provides a measure of the range of the point on the target surface using triangulation and the direction of the projected beam provides the x and y coordinates. The focussing device can be controlled to vary the focal length of the projected beam and to control the beam size at the target object to vary the area of the target surface illuminated by the beam and thereby to control the resolution of the measurements.
    Type: Application
    Filed: August 9, 2006
    Publication date: August 6, 2009
    Applicant: NEPTEC
    Inventors: Xiang Zhu, I. Christine Smith, Chad English
  • Publication number: 20090147239
    Abstract: An apparatus for tracking an object or measuring the range of an object comprises a beam generator for generating first and second beams of energy and projecting the first and second beams towards a target surface whose distance from the apparatus is to be measured, a receiver for receiving energy from the first and second beams reflected from the target surface and for projecting beam energy reflected from the first beam onto a detector for detecting the position of the first beam energy. The position is dependent on the angle between the incident first beam and reflected first beam energy at the target surface, and thereby on the distance between the apparatus and the position from which the first beam is reflected from the surface. A second detector is provided for receiving second beam energy reflected from the target surface for measuring the range of the target by time of flight.
    Type: Application
    Filed: August 9, 2006
    Publication date: June 11, 2009
    Inventors: Xiang Zhu, I. Christine Smith
  • Patent number: 7525050
    Abstract: An apparatus and a method for determining the location of a pointing device in the vicinity of a set of receivers able to receive one or more locating signals transmitted through a medium. The method includes receiving at a receiver a signal that includes a locating signal and an interfering signal, determining an estimated interference signal indicative of the interfering signal included in the signal received, determining a signal indicative of the difference between the received signal and the estimated interference signal, and using the signal indicative of the difference to compute the location of the pointing device on a surface near the set of receivers. One version uses a separate receiver from which to determine the estimated interference signal, while another version uses the received signal at a time when there is expected to be no locating signal present in order to determine the estimated interference signal. An adaptive filter computes the estimated interference signal.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: April 28, 2009
    Assignee: Luidia, Inc.
    Inventors: Philip A. Weaver, Xiang Zhu
  • Patent number: 7411432
    Abstract: An integrated circuit of an embodiment may comprise synchronous logic, combinational logic, and clock circuitry to clock the synchronous logic through various states dependent on the combinational logic. The synchronous logic may comprise a plurality of master-slave registers. The combinational logic is configured to drive data inputs of the synchronous logic dependent on states established by the master-slave registers. The clock circuitry is configured to clock the master portion of the master-slave registers with a lag rendering of a clock signal and to clock the slave portion of the registers with a lead rendering of the clock signal. In a particular example, the circuitry may define a frequency divider of a complementary CMOS realization.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: August 12, 2008
    Assignee: Lattice Semiconductor Corporation
    Inventor: Xiang Zhu
  • Patent number: 7224213
    Abstract: A switched-capacitor ripple-smoothing filter includes a first pair of capacitors. The filter is configured such that either capacitor in the first pair may be reset and have a terminal coupled to a first input port and such that the remaining capacitor in the first pair is isolated from the first input port and has the terminal coupled to a first output port while the other capacitor is being charged. The filter further includes a second pair of capacitors, the filter being configured such that either capacitor in the second pair may be reset and have a terminal coupled to a second input port and such that the remaining capacitor in the second pair is isolated from the second input port and has the terminal coupled to a second output port while the other capacitor in the second pair is being charged. Advantageously, the filter is configured such that the capacitors in the first and second pair are reset responsive to the assertion of a single reset signal.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: May 29, 2007
    Assignee: Lattice Semiconductor Corporation
    Inventors: Xiang Zhu, Ming Qu
  • Patent number: 7212051
    Abstract: A phase detector and control signal generator responds to a reference signal and a feedback signal to produce a non-delayed up and down signal. A programmable delay unit delays the non-delayed up and down signal to provide up and down signals for a charge pump. A divider configured to respond to the up and down signals provides a divided clock signal. A non-overlapped clock generator configured to respond to the divided clock signal to provide non-overlapped hold even and hold odd signals for the switched-capacitor ripple-smoothing filter.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: May 1, 2007
    Assignee: Lattice Semiconductor Corporation
    Inventors: Xiang Zhu, Ming Qu, Zhengyu Yuan
  • Patent number: 7081781
    Abstract: A charge pump for a differential phase-locked loop (PLL) is provided. The charge pump includes a current switch configured to voltage to source and sink a current in a complementary fashion from a pair of differential output nodes. The charge pump includes a common-mode feedback loop to maintain the charging and discharging of the differential output nodes with respect to a common-mode voltage. Transconductance amplifiers are provided within the common-mode feedback loop to provide greater dynamic range to the charging and discharging of the differential output nodes.
    Type: Grant
    Filed: April 2, 2004
    Date of Patent: July 25, 2006
    Assignee: Lattice Semiconductor Corporation
    Inventors: Xiang Zhu, Ming Qu, Yongmin Ge
  • Publication number: 20060152275
    Abstract: A signal transmitting circuit includes a driving circuit, and a plurality of receiving circuits receiving signals transmitted from the driving circuit. Each of the receiving circuits is coupled to the driving circuit consecutively via a transmission line. A voltage regulator is coupled to the driving circuit and the receiving circuits and provides power to the driving circuit and the receiving circuits. A number of capacitors are coupled between the voltage regulator and the ground for filtering the noise of the power output from the voltage regulator. The capacitors between the voltage regulator and the north bridge chipset filtering the noise of the power output from the voltage regulator maintain signal integrity as the terminal resistor does. It is of advantage that the signal transmitting circuit is simple to manufacture and very suitable for mass production.
    Type: Application
    Filed: December 23, 2005
    Publication date: July 13, 2006
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Shou-Kuo Hsu, Jie Zhou, Xiang Zhu, Hong-Mei Hu
  • Publication number: 20060132577
    Abstract: A circuit topology for high-speed printed circuit board includes a driving circuit, and a number of receiving circuits. The driving circuit is mounted on the printed circuit board and coupled to a node via a transmission line. The receiving circuits receive signals transmitted from the driving circuit. Each receiving circuit is coupled to the node separately via a transmission line. Transmission line lengths between each of the receiving circuits and the node are substantially equal. The close the node is to the receiving circuits, the better the signal integrity. Using the circuit topology maintains signal integrity as the termination resistor does. It is of advantage that the circuit topology is simple to manufacture and very suitable for mass production.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 22, 2006
    Applicant: HON HAI Precision Industry CO., LTD.
    Inventors: Shou-Kuo Hsu, Jie Zhou, Xiang Zhu, Hong-Mei Hu
  • Patent number: 7002418
    Abstract: A phase detector and control signal generator responds to a reference signal and a feedback signal to produce a non-delayed up and down signal. A programmable delay unit delays the non-delayed up and down signal to provide up and down signals for a charge pump. A divider configured to respond to the up and down signals provides a divided clock signal. A non-overlapped clock generator configured to respond to the divided clock signal to provide non-overlapped hold even and hold odd signals for the switched-capacitor ripple-smoothing filter.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: February 21, 2006
    Assignee: Lattice Semiconductor Corporation
    Inventors: Xiang Zhu, Ming Qu, Zhengyu Yuan
  • Patent number: 6983090
    Abstract: A high-resolution tunable optical filter uses a dispersive element in a double pass configuration. The double pass configuration is provided by a reflective quarter-wave plate that conveniently reduces polarization dispersion loss (PDL) of the filter. The filter also includes a fibre tube for supporting an input optical fibre and an output optical fibre, and a lens having an optical axis, which is disposed such that a focal point thereof is substantially at one of the input and output optical fibres. To provide increase resolution the filter is tuned by rotating the reflective quarter-wave plate. To provide high power capabilities the fibre jackets of the input and output fibres are optionally stripped back. To provide a symmetrical spectral response the fibre tube is optionally mounted at an angle to the optical axis of the lens.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: January 3, 2006
    Assignee: JDS Uniphase Inc.
    Inventors: John Weber, Xiang Zhu, Shane H. Woodside
  • Publication number: 20050248395
    Abstract: A switched-capacitor ripple-smoothing filter includes a first pair of capacitors. The filter is configured such that either capacitor in the first pair may be reset and have a terminal coupled to a first input port and such that the remaining capacitor in the first pair is isolated from the first input port and has the terminal coupled to a first output port while the other capacitor is being charged. The filter further includes a second pair of capacitors, the filter being configured such that either capacitor in the second pair may be reset and have a terminal coupled to a second input port and such that the remaining capacitor in the second pair is isolated from the second input port and has the terminal coupled to a second output port while the other capacitor in the second pair is being charged. Advantageously, the filter is configured such that the capacitors in the first and second pair are reset responsive to the assertion of a single reset signal.
    Type: Application
    Filed: May 7, 2004
    Publication date: November 10, 2005
    Inventors: Xiang Zhu, Ming Qu
  • Publication number: 20050248413
    Abstract: A phase detector and control signal generator responds to a reference signal and a feedback signal to produce a non-delayed up and down signal. A programmable delay unit delays the non-delayed up and down signal to provide up and down signals for a charge pump. A divider configured to respond to the up and down signals provides a divided clock signal. A non-overlapped clock generator configured to respond to the divided clock signal to provide non-overlapped hold even and hold odd signals for the switched-capacitor ripple-smoothing filter.
    Type: Application
    Filed: May 7, 2004
    Publication date: November 10, 2005
    Inventors: Xiang Zhu, Ming Qu, Zhengyu Yuan
  • Publication number: 20050218948
    Abstract: A charge pump for a differential phase-locked loop (PLL) is provided. The charge pump includes a current switch configured to voltage to source and sink a current in a complementary fashion from a pair of differential output nodes. The charge pump includes a common-mode feedback loop to maintain the charging and discharging of the differential output nodes with respect to a common-mode voltage. Transconductance amplifiers are provided within the common-mode feedback loop to provide greater dynamic range to the charging and discharging of the differential output nodes.
    Type: Application
    Filed: April 2, 2004
    Publication date: October 6, 2005
    Inventors: Xiang Zhu, Ming Qu, Yongmin Ge
  • Patent number: 6680625
    Abstract: High speed CML logic gate systems for providing selected Boolean logic functions. Two halves of a substantially symmetric first system, having a relatively small number (14) of CMOS transistors, are used to generate any of the logic functions AND, NAND, OR and NOR. Two halves of a substantially symmetric second system having another small number (10) of transistors are used to generate any of the logic functions XOR, XNOR and NOT. In either system, the sum of currents passing through certain voltage-controlling gates is substantially constant.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: January 20, 2004
    Assignee: Lattice Semiconductor Corp.
    Inventors: Kochung Lee, Ming Qu, Xueping Jiang, Xiang Zhu
  • Patent number: 6680172
    Abstract: The present invention relates to novel cancer markers and compositions and methods for cancer therapies. For example, the present invention provides compositions and methods for the detection of gene expression of particular marker genes as indicative of cancers, while control of said gene expression provides for intervention in cancer therapies and, in particular, glioma therapies.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: January 20, 2004
    Assignee: Regents of the University of Michigan
    Inventors: Samir M. Hanash, David Rickman, Rachana Tyagi, Xiao-Xiang Zhu, Phillip Kish
  • Publication number: 20030179990
    Abstract: A high-resolution tunable optical filter uses a dispersive element in a double pass configuration. The double pass configuration is provided by a reflective quarter-wave plate that conveniently reduces polarization dispersion loss (PDL) of the filter. The filter also includes a fibre tube for supporting an input optical fibre and an output optical fibre, and a lens having an optical axis, which is disposed such that a focal point thereof is substantially at one of the input and output optical fibres. To provide increase resolution the filter is tuned by rotating the reflective quarter-wave plate. To provide high power capabilities the fibre jackets of the input and output fibres are optionally stripped back. To provide a symmetrical spectral response the fibre tube is optionally mounted at an angle to the optical axis of the lens.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 25, 2003
    Inventors: John Weber, Xiang Zhu, Shane H. Woodside
  • Patent number: 4961988
    Abstract: This invention relates to a general packing of expanded graphite and the process for production thereof. The packing mainly includes vermiform laminae of expanded graphite and auxiliary materials, which is characterized by the embedment of the auxiliary materials into the vermiform graphite laminae, the bonding of the auxiliary materials to the vermiform graphite laminae with organic adhesives. The process for producing of the packing comprises the treatment of graphite with strong acid to produce interlaminar compound followed by transient expansion of treated graphite to become vermiform and the combination of vermiform graphite laminae with the auxiliary materials to produce packing. Wherein the above mentioned vermiform laminae of expanded graphite are bonded to the auxiliary materials with organic adhesives, and the auxiliary materials are embedded between the vermiform laminae of expanded graphite.
    Type: Grant
    Filed: September 27, 1988
    Date of Patent: October 9, 1990
    Assignee: Zhejiang CI XI Seal Material Factory
    Inventor: Di Xiang Zhu