Patents by Inventor Xiangang Luo

Xiangang Luo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250116801
    Abstract: A metasurface-based imaging system, a design method, and a detector. In an optical axis direction, the metasurface-based imaging system sequentially comprises: a quadratic-phase-based metasurface structure, consisting of a sub-wavelength unit structure array (1) and a substrate (2), the metasurface structure being a monolayer structure and used for implementing preset phase distribution; and a wavevector filter (3), each position of which is equivalent to one aperture stop, the wavevector filter having a filtering function and having different wavevector modulation effects under different incident angles. The metasurface-based imaging system has the advantages of being ultra-light, ultra-thin, and high in imaging quality, and can achieve large-area, ultra-thin, and large field-of-view imaging detection.
    Type: Application
    Filed: March 30, 2023
    Publication date: April 10, 2025
    Applicant: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang LUO, Fei ZHANG, Mingbo PU, Ting XIE, Xiaoliang MA
  • Patent number: 12272530
    Abstract: The present disclosure relates to a field of dry etching technology. The present disclosure provides an ultra-large area scanning reactive ion etching machine and an etching method thereof. The ultra-large area scanning reactive ion etching machine includes: an injection chamber, an etching reaction chamber, a transition chamber, and an etching ion generation chamber. By moving a sample holder among the injection chamber, the etching reaction chamber and the transition chamber in a scanning direction, a scanning etching is performed on a sample placed on the sample holder, which may realize a large-area, uniform and efficient etching.
    Type: Grant
    Filed: December 29, 2018
    Date of Patent: April 8, 2025
    Assignee: The Institute of Optics and Electronics, The Chinese Academy of Sciences
    Inventors: Xiangang Luo, Zeyu Zhao, Yanqin Wang, Ping Gao, Xiaoliang Ma, Mingbo Pu, Xiong Li, Yinghui Guo
  • Publication number: 20250104799
    Abstract: Aspects of the present disclosure configure a memory sub-system controller to generate virtual blocks using partial good blocks or portions of full blocks. The controller identifies a region of a set of memory components comprising a plurality of planes across a plurality of decks. The controller determines that a first memory block within a first deck associated with a first plane of the plurality of planes is a first partial good block (PGB), the first PGB including a portions categorized as being defective and portions categorized as being non-defective. The controller determines that a second memory block associated with a second plane is a full block (FB), the FB being categorized as non-defective. The controller generates a virtual block using the first PGB of the first memory block associated with the first plane and a portion of the FB of the second memory block associated with the second plane.
    Type: Application
    Filed: July 30, 2024
    Publication date: March 27, 2025
    Inventors: Guang Hu, Xiangang Luo, Jianmin Huang
  • Publication number: 20250086055
    Abstract: Methods, systems, and devices for redundant array management techniques are described. A memory system may include a volatile memory device, a non-volatile memory device, and one or more redundant arrays of independent nodes. The memory system may include a first redundant array controller and a second redundant array controller of a redundant array of independent nodes. The memory system may receive a write command associated with writing data to a type of memory cell. Based on the type of memory cell, the memory system may generate parity data corresponding to the data using one or both of the first redundant array controller and the second redundant array controller. In some examples, the first redundant array controller may be configured to generate parity data associated with a first type of failure and the second redundant array controller may be configured to generate parity data associated with a second type of failure.
    Type: Application
    Filed: September 19, 2024
    Publication date: March 13, 2025
    Inventors: Chun Sum Yeung, Jonathan S. Parry, Deping He, Xiangang Luo, Reshmi Basu
  • Patent number: 12229000
    Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including detecting a read error with respect to data residing in a first block of the memory device, wherein the first block is associated with a voltage offset bin; determining a most recently performed error-handling operation performed on a second block associated with the voltage offset bin; and performing the error-handling to recover the data.
    Type: Grant
    Filed: June 8, 2023
    Date of Patent: February 18, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Shane Nowell, Mustafa N. Kaynak, Sampath K. Ratnam, Peter Feeley, Sivagnanam Parthasarathy, Devin M. Batutis, Xiangang Luo
  • Patent number: 12228710
    Abstract: An ultra-wide angle broadband polarization imaging system based on a metasurface, and a detection apparatus, the imaging system comprising a first lens (L1) having negative optical power, a linear polarizer (P1), a quarter wave plate (P2), a diaphragm (STO), a second lens (L2) having positive optical power, a third lens (L3) having positive optical power, and the metasurface (M), wherein an object side surface and an image side surface of the lens are planar or spherical; and the phase distribution required for the system in a broadband spectrum band is achieved by setting different rotation angles ? of a unit structure of the metasurface.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: February 18, 2025
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Mingbo Pu, Ting Xie, Fei Zhang, Xiaoliang Ma
  • Publication number: 20250044558
    Abstract: An ultra-wide angle broadband polarization imaging system based on a metasurface, and a detection apparatus, the imaging system comprising a first lens (L1) having negative optical power, a linear polarizer (P1), a quarter wave plate (P2), a diaphragm (STO), a second lens (L2) having positive optical power, a third lens (L3) having positive optical power, and the metasurface (M), wherein an object side surface and an image side surface of the lens are planar or spherical; and the phase distribution required for the system in a broadband spectrum band is achieved by setting different rotation angles ? of a unit structure of the metasurface.
    Type: Application
    Filed: November 16, 2022
    Publication date: February 6, 2025
    Applicant: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang LUO, Mingbo PU, Ting XIE, Fei ZHANG, Xiaoliang MA
  • Patent number: 12210448
    Abstract: A method includes writing, to a first data structure, indices corresponding to address locations of a logical-to-physical (L2P) data structure that maps a plurality of logical block addresses (LBAs) associated with the L2P data structure, initiating performance of a media management operation involving one or more memory blocks in which data associated with the LBAs is written, and refraining from rewriting particular entries in the L2P table that correspond to LBAs whose index in the first data structure is a particular value during performance of the media management operation.
    Type: Grant
    Filed: September 1, 2022
    Date of Patent: January 28, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Xiangang Luo, Jianmin Huang, Xiaolai Zhu, Deping He, Kulachet Tanpairoj, Hong Lu, Chun Sum Yeung
  • Patent number: 12197743
    Abstract: A method that includes writing a plurality of codewords to a plurality of memory blocks of a memory device, where each of the plurality of codewords has a physical codeword index corresponding to a respective memory block in which each codeword is written, and assigning a virtual codeword index to each of the plurality of codewords to provide a plurality of virtual codeword indices, where assigning the virtual codeword index to each of the plurality of codewords is based, at least in part, on a location in a virtual block among a plurality of virtual blocks of memory cells corresponding to the physical codeword index of each codeword among the plurality of codewords.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: January 14, 2025
    Assignee: Micron Technology, Inc.
    Inventors: Xiangang Luo, Zhengang Chen
  • Patent number: 12181794
    Abstract: A photolithography method includes: sequentially preparing a functional film layer, a reflective auxiliary imaging film layer and a first photoresist layer which are stacked, on a photolithography substrate; performing photolithography on the first photoresist layer to obtain a first photolithography structure; etching the reflective auxiliary imaging film layer with the first photolithography structure as a masking layer; on the pattern of the reflective auxiliary imaging film layer, sequentially preparing a second photoresist layer and a transmissive auxiliary imaging film layer which stacked; performing surface plasmon photolithography with the pattern of the reflective auxiliary imaging film layer as a mask, removing the transmissive auxiliary imaging film layer, and then developing the second photoresist layer, to obtain a second photolithography structure; and etching the functional film layer, with the second photolithography structure as a masking layer, to obtain a third photolithography structure.
    Type: Grant
    Filed: November 14, 2022
    Date of Patent: December 31, 2024
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Kaipeng Liu, Yunfei Luo, Shuai Mou, Ping Gao, Zeyu Zhao
  • Patent number: 12174322
    Abstract: Provided are an F-P sensor probe, an absolute distance measurement device, and an absolute distance measurement method, which relate to the field of non-contact absolute distance measurement technologies. This structure includes a first N+1-core multimode optical fiber probe (9), an optical fiber sleeve (10), an imaging lens group (11), and a reference lens (12), wherein: the first N+1-core multimode optical fiber probe (9), the imaging lens group (11), and the reference lens (12) are sequentially fixed inside the optical fiber sleeve (10) along a direction of the F-P sensor probe toward a sample (8); and the first N+1-core multimode optical fiber probe (9) includes N first multimode optical fibers (16) and one second multimode optical fiber (17), where N?2, and the N first multimode optical fibers (16) are arranged around the second multimode optical fiber (17).
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: December 24, 2024
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Tiancheng Gong, Chengwei Zhao, Yanqin Wang, Guiyuan Jia, Yanwu Chu, Changtao Wang
  • Publication number: 20240411475
    Abstract: An apparatus can include a block program erase count (PEC) component. The block PEC component can monitor a quantity of program erase counts (PECs) for each particular type of block of a non-volatile memory array. The block PEC component can further determine which block of the superblock to write host data to next based on the quantity of PECs. The block PEC component can further write host data to the determined block.
    Type: Application
    Filed: August 22, 2024
    Publication date: December 12, 2024
    Inventors: Jianmin Huang, Xiangang Luo, Chun Sum Yeung, Kulachet Tanpairoj
  • Publication number: 20240404604
    Abstract: Methods, systems, and devices for determining offsets for memory read operations are described. In response to a threshold quantity of pages failing initial reads but being successfully read using a same reference adjustment during re-reads, the offset responsible for the adjustment may be used as a first-applied offset for subsequent re-reads or a baseline offset for subsequent initial reads. After the initial reads begin using the reference adjustment, if a threshold quantity of pages fail initial reads, the offset used for the initial read may be adjusted to be the offset used to perform the successful re-reads. If an updated offset to use a baseline is not identified, the baseline offset may be cleared so the original reference may again be used without adjustment for initial reads.
    Type: Application
    Filed: June 4, 2024
    Publication date: December 5, 2024
    Inventors: Jie Zhou, Xiangang Luo, Min Rui Ma, Guang Hu
  • Publication number: 20240370181
    Abstract: Aspects of the present disclosure configure a system component, such as a memory sub-system controller, to dynamically allocate blocks from a free block pool. The controller generates a free block pool that includes a collection of full blocks and a collection of partial good blocks (PGBs) of a set of memory components, a size of a full block in the collection of full blocks corresponding to a combination of two or more PGBs of the collection of PGBs. The controller receives a request to write data. The controller allocates an individual full block from the collection of full blocks or an individual PGB from the collection of PGBs based on determining whether the request to write the data has been received from the host device or the controller of the memory sub-system.
    Type: Application
    Filed: May 1, 2024
    Publication date: November 7, 2024
    Inventors: Yuqi Zhu, Guang Hu, Ting Luo, Xiangang Luo
  • Publication number: 20240345947
    Abstract: A method includes writing, to a first data structure, indices corresponding to address locations of a logical-to-physical (L2P) data structure that maps a plurality of logical block addresses (LBAs) associated with the L2P data structure, initiating performance of a media management operation involving one or more memory blocks in which data associated with the LBAs is written, and refraining from rewriting particular entries in the L2P table that correspond to LBAs whose index in the first data structure is a particular value during performance of the media management operation.
    Type: Application
    Filed: September 1, 2022
    Publication date: October 17, 2024
    Inventors: Xiangang Luo, Jianmin Huang, Xiaolai Zhu, Deping He, Kulachet Tanpairoj, Hong Lu, Chun Sum Yeung
  • Patent number: 12111724
    Abstract: Methods, systems, and devices for redundant array management techniques are described. A memory system may include a volatile memory device, a non-volatile memory device, and one or more redundant arrays of independent nodes. The memory system may include a first redundant array controller and a second redundant array controller of a redundant array of independent nodes. The memory system may receive a write command associated with writing data to a type of memory cell. Based on the type of memory cell, the memory system may generate parity data corresponding to the data using one or both of the first redundant array controller and the second redundant array controller. In some examples, the first redundant array controller may be configured to generate parity data associated with a first type of failure and the second redundant array controller may be configured to generate parity data associated with a second type of failure.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: October 8, 2024
    Assignee: Micron Technology, Inc.
    Inventors: Chun Sum Yeung, Jonathan S. Parry, Deping He, Xiangang Luo, Reshmi Basu
  • Patent number: 12100188
    Abstract: Provided are template mark detection method and template position correction method based on single camera, including: performing image collection on mark on template by single camera, and obtaining binary image after preprocessing; performing corner detection of jagged edges on binary image to obtain corner set of jagged edges; performing edge detection and line detection sequentially on binary image to obtain set of edge line segments from coarse detection; traversing such set, and judging and retaining collinear line segments, to obtain set of collinear line segments from coarse detection; traversing corner set of jagged edges, for point-line collinearity judgment with line segments in set of collinear line segments from coarse detection, to obtain set of point-line from fine detection; and performing linear fitting on set of point-line from fine detection, and calculating an inclination angle of each straight line through an arctan function, thus completing detection of mark.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: September 24, 2024
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Chengwenli Li, Minggang Liu, Jian Yan, Changtao Wang
  • Publication number: 20240311029
    Abstract: A method includes forming at least a portion of a first superblock using a first subset of blocks from at least one memory die of a memory sub-system and forming at least a portion of a second superblock using a second subset of blocks from the at least one memory die of the memory sub-system.
    Type: Application
    Filed: May 20, 2024
    Publication date: September 19, 2024
    Inventors: Kishore K. Muchherla, Jianmin Huang, Xiangang Luo
  • Publication number: 20240311057
    Abstract: A method can comprise receiving data corresponding to a sequence of write commands to write the data to a memory array comprising a plurality of strings of memory cells. Each string of the plurality of strings comprises: a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block having a first programming characteristic; and a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block having a second programming characteristic.
    Type: Application
    Filed: March 15, 2024
    Publication date: September 19, 2024
    Inventors: Daniel J. Hubbard, Kishore K. Muchherla, Hong Lu, Xiangang Luo, Akira Goda
  • Patent number: 12092960
    Abstract: A mask topology optimization method for surface plasmon near-field photolithography, including: acquiring first mask data and performing fuzzy processing and projection processing on same to obtain second mask data; performing forward calculation according to the second mask data and a preset surface plasmon near-field photolithography condition to obtain imaging data and forward field data; calculating an imaging error between the imaging data and expected imaging data; performing adjoint calculation on the second mask data to obtain adjoint field data; calculating a gradient matrix of the imaging error relative to the first mask data according to the forward field data and the adjoint field data; and updating the first mask data according to the gradient matrix, repeating the steps for iteration calculation until the optimized mask data is obtained, and outputting a final mask pattern.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: September 17, 2024
    Assignee: THE INSTITUTE OF OPTICS AND ELECTRONICS, THE CHINESE ACADEMY OF SCIENCES
    Inventors: Xiangang Luo, Mingfeng Xu, Mingbo Pu, Di Sang, Xiaoliang Ma, Xiong Li, Ping Gao, Zeyu Zhao