Abstract: Example control methods and apparatus are described. An example control method for an uninterruptible power supply system includes: when a bypass power supply branch supplies power to a load, outputting a first drive signal to a first switch device and outputting a second drive signal to a second switch device; and controlling the first drive signal and the second drive signal to have a phase difference with an input voltage of the bypass power supply branch; or when a load current of the bypass power supply branch is less than a first threshold, outputting an inverter control signal to control an inverter power supply branch to charge an energy storage battery; or when a current of the inverter power supply branch flows back to an input end of the bypass power supply branch, turning off the first switch device and the second switch device via the inverter power supply branch.

Abstract: A current limiting control method for a three-level inverter, comprising the following steps: S1. when a current output from a bridge arm is greater than or equal to a current limiting threshold and a received overcurrent signal is enabled, first turning off the main switch transistors and then turning off the auxiliary switch transistors; S2. when the current output from the bridge arm drops to lower than the current limiting threshold and the received overcurrent signal is disabled, turning on the auxiliary switch transistors; S3. when the received overcurrent signal is disabled and a next PWM effective edge of the main switch transistors arrives, turning on the main switch transistors. The present invention relates also to a current limiting control device for a three-level inverter. By implementing the present invention, it is possible to ensure voltage waveform quality and reduce switching loss.

Abstract: A current limiting control method for a three-level inverter, comprising the following steps: S1. when a current output from a bridge arm is greater than or equal to a current limiting threshold and a received overcurrent signal is enabled, first turning off the main switch transistors and then turning off the auxiliary switch transistors; S2. when the current output from the bridge arm drops to lower than the current limiting threshold and the received overcurrent signal is disabled, turning on the auxiliary switch transistors; S3. when the received overcurrent signal is disabled and a next PWM effective edge of the main switch transistors arrives, turning on the main switch transistors. The present invention relates also to a current limiting control device for a three-level inverter. By implementing the present invention, it is possible to ensure voltage waveform quality and reduce switching loss.