Patents by Inventor Xiangbin Wu
Xiangbin Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230278537Abstract: System and techniques for vehicle operation safety model (VOSM) compliance measurement are described herein. A subject vehicle is tested in a vehicle following scenario against VOSM parameter compliance. The test measures the subject vehicle activity during phases of the following scenario in which a lead vehicle slows and produces log data and calculations that form the basis of a VOSM compliance measurement.Type: ApplicationFiled: May 15, 2023Publication date: September 7, 2023Inventors: Qianying Zhu, Ping Guo, Xinxin Zhang, Fei Li, Xiangbin Wu
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Patent number: 11697406Abstract: System and techniques for vehicle operation safety model (VOSM) compliance measurement are described herein. A subject vehicle is tested in a vehicle following scenario against VOSM parameter compliance. The test measures the subject vehicle activity during phases of the following scenario in which a lead vehicle slows and produces log data and calculations that form the basis of a VOSM compliance measurement.Type: GrantFiled: November 19, 2021Date of Patent: July 11, 2023Assignee: Mobileye Vision Technologies Ltd.Inventors: Qianying Zhu, Ping Guo, Xinxin Zhang, Fei Li, Xiangbin Wu
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Publication number: 20230049128Abstract: System and techniques for vehicle operation safety model (VOSM) compliance measurement are described herein. A subject vehicle is tested in a vehicle following scenario against VOSM parameter compliance. The test measures the subject vehicle activity during phases of the following scenario in which a lead vehicle slows and produces log data and calculations that form the basis of a VOSM compliance measurement.Type: ApplicationFiled: November 19, 2021Publication date: February 16, 2023Inventors: Qianying Zhu, Ping Guo, Xinxin Zhang, Fei Li, Xiangbin Wu
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Publication number: 20230043905Abstract: System and techniques for test scenario verification, for a simulation of an autonomous vehicle safety action, are described. In an example, measuring performance of a test scenario used in testing an autonomous driving safety requirement includes: defining a test environment for a test scenario that tests compliance with a safety requirement including a minimum safe distance requirement; identifying test procedures to use in the test scenario that define actions for testing the minimum safe distance requirement; identifying test parameters to use with the identified test procedures, such as velocity, amount of braking, timing of braking, and rate of acceleration or deceleration; and creating the test scenario for use in an autonomous driving test simulator. Use of the test scenario includes applying the identified test procedures and the identified test parameters to identify a response of a test vehicle to the minimum safe distance requirement.Type: ApplicationFiled: December 17, 2021Publication date: February 9, 2023Inventors: Qianying Zhu, Lidan Zhang, Xiangbin Wu, Xinxin Zhang, Fei Li
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Publication number: 20220343762Abstract: One or more processors may be configured to determine one or more prospective routes of an ego vehicle being at least partially controlled by a human driver; receive first sensor data, representing one or more attributes of a second vehicle; determine a danger probability of the one or more prospective routes of the first vehicle using the at least the one or more attributes of the second vehicle from the first sensor data; and if each of the one or more prospective routes of the first vehicle has a danger probability outside of a predetermined range, send a signal representing a safety intervention. Whenever a safety intervention signal is sent, the one or more processors may be configured to increment or decrement a counter.Type: ApplicationFiled: December 27, 2019Publication date: October 27, 2022Inventors: Ignacio J. ALVAREZ, Cornelius BUERKLE, Haitao JI, Fei LI, Fabian OBORIL, Johannes QUAST, Kay-Ulrich SCHOLL, John Charles WEAST, Xiangbin WU, Xinxin ZHANG, Zhiyuan ZHANG, Qianying ZHU
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Publication number: 20220333944Abstract: Provided is a device and a method for route planning. The route planning device (100) may include a data interface (128) coupled to a road and traffic data source (160); a user interface (170) configured to display a map and receive a route planning request from a user, the route planning request including a line of interest on the map; a processor (110) coupled to the data interface (128) and the user interface (170). The processor (110) may be configured to identify the line of interest in response to the route planning request; acquire, via the data interface (128), road and traffic information associated with the line of interest from the road and traffic data source (160); and calculate, based on the acquired road and traffic information, a navigation route that matches or corresponds to the line of interest and meets or satisfies predefined road and traffic constraints.Type: ApplicationFiled: December 27, 2019Publication date: October 20, 2022Inventors: Yuqing HOU, Xiaolong LIU, Ignacio J. ALVAREZ, Xiangbin WU
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Patent number: 11474736Abstract: Embodiments of the present disclosure provide devices, techniques, and configurations for network interface controllers (NICs) that log write packets received from a network in non-volatile random access memory (NVRAM). In one embodiment, a NIC includes a network interface to couple a host of the NIC to a network, a NVRAM, and a controller coupled with the network interface and the NVRAM, where the controller is to log write packets received at the network interface from the network in the NVRAM. Other embodiments may be described and/or claimed.Type: GrantFiled: December 29, 2016Date of Patent: October 18, 2022Assignee: Intel CorporationInventors: Zhiyuan Zhang, Xiangbin Wu, Qianying Zhu, Xinxin Zhang, Yingzhe Shen, Haitao Ji
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Publication number: 20220324467Abstract: A safety system (200) for a vehicle (100) is provided. The safety system (200) may include one or more processors (102). The one or more processors (102) may be configured to control a vehicle (100) to operate in accordance with the predefined stored driving model parameters, to detect vehicle operation data during the operation of the vehicle (100), to determine whether to change predefined driving model parameters based on the detected vehicle operation data and the driving model parameters, to change the driving model parameters to changed driving model parameters, and to control the vehicle (100) to operate in accordance with the changed driving model parameters.Type: ApplicationFiled: December 27, 2019Publication date: October 13, 2022Inventors: Ignacio J. ALVAREZ, Florian GEISSLER, Haitao JI, Fei LI, Fabian OBORIL, Rafael ROSALES, Kay-Ulrich SCHOLL, Xiangbin WU, Xinxin ZHANG, Zhiyuan ZHANG, Qianying ZHU
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Patent number: 11113159Abstract: An embodiment of a memory apparatus may include a logger to log memory access data in persistent storage media, a log indexer communicatively coupled to the logger to index the memory access log data in an index table in a system memory, and a key compressor communicatively coupled to the log indexer to compress an index key for the index table. Other embodiments are disclosed and claimed.Type: GrantFiled: June 30, 2017Date of Patent: September 7, 2021Assignee: Intel CorporationInventors: Zhiyuan Zhang, Xiangbin Wu, Xinxin Zhang, Qianying Zhu, Haitao Ji, Yingzhe Shen
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Patent number: 11048588Abstract: Embodiments of an invention for monitoring the operation of a processor are disclosed. In one embodiment, a system includes a processor and a hardware agent external to the processor. The processor includes virtualization logic to provide for the processor to operate in a root mode and in a non-root mode. The hardware agent is to verify operation of the processor in the non-root mode based on tracing information to be collected by a software agent to be executed by the processor in the root mode.Type: GrantFiled: February 11, 2020Date of Patent: June 29, 2021Assignee: Intel CorporationInventors: Gilbert Neiger, Andrew V. Anderson, Richard A. Uhlig, David M. Durham, Ronak Singhal, Xiangbin Wu, Sailesh Kottapalli
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Publication number: 20200257609Abstract: Embodiments of an invention for monitoring the operation of a processor are disclosed. In one embodiment, a system includes a processor and a hardware agent external to the processor. The processor includes virtualization logic to provide for the processor to operate in a root mode and in a non-root mode. The hardware agent is to verify operation of the processor in the non-root mode based on tracing information to be collected by a software agent to be executed by the processor in the root mode.Type: ApplicationFiled: February 11, 2020Publication date: August 13, 2020Applicant: Intel CorporationInventors: Gilbert Neiger, Andrew V. Anderson, Richard A. Uhlig, David M. Durham, Ronak Singhal, Xiangbin Wu, Sailesh Kottapalli
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Publication number: 20200226790Abstract: A sensor calibrator comprising one or more processors configured to receive sensor data representing a calibration pattern detected by a sensor during a period of relative motion between the sensor and the calibration pattern in which the sensor or the calibration pattern move along a linear path of travel; determine a calibration adjustment from the plurality of images; and send a calibration instruction for calibration of the sensor according to the determined calibration adjustment. Alternatively, a sensor calibration detection device, comprising one or more processors, configured to receive first sensor data detected during movement of a first sensor along a route of travel; determine a difference between the first sensor data and stored second sensor data; and if the difference is outside of a predetermined range, switch from a first operational mode to a second operational mode.Type: ApplicationFiled: March 27, 2020Publication date: July 16, 2020Inventors: Ignacio Alvarez, Cornelius Buerkle, Maik Sven Fox, Florian Geissler, Ralf Graefe, Yiwen Guo, Yuqing Hou, Fabian Oboril, Daniel Pohl, Alexander Carl Unnervik, Xiangbin Wu
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Publication number: 20200159629Abstract: An embodiment of a memory apparatus may include a logger to log memory access data in persistent storage media, a log indexer communicatively coupled to the logger to index the memory access log data in an index table in a system memory, and a key compressor communicatively coupled to the log indexer to compress an index key for the index table. Other embodiments are disclosed and claimed.Type: ApplicationFiled: June 30, 2017Publication date: May 21, 2020Applicant: Intel CorporationInventors: Zhiyuan ZHANG, Xiangbin WU, Xinxin ZHANG, Qianying ZHU, Haitao JI, Yingzhe SHEN
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Patent number: 10599547Abstract: Embodiments of an invention for monitoring the operation of a processor are disclosed. In one embodiment, a system includes a processor and a hardware agent external to the processor. The processor includes virtualization logic to provide for the processor to operate in a root mode and in a non-root mode. The hardware agent is to verify operation of the processor in the non-root mode based on tracing information to be collected by a software agent to be executed by the processor in the root mode.Type: GrantFiled: November 30, 2017Date of Patent: March 24, 2020Assignee: Intel CorporationInventors: Gilbert Neiger, Andrew V. Anderson, Richard A. Uhlig, David M. Durham, Ronak Singhal, Xiangbin Wu, Sailesh Kottapalli
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Patent number: 10581997Abstract: Examples may include techniques for storing or accessing a key-value (KV) item stored in a memory that is part of a memcached system. A KV server coupled with a network input/output device may be capable of allocating one or more item slots from the memory and indicating to logic or features of the network input/output device whether the KV item is stored in a single allocated item slot of the memory, accessible via multiple allocated item slots of the memory or whether the KV item is being updated.Type: GrantFiled: March 5, 2015Date of Patent: March 3, 2020Assignee: INTEL CORPORATIONInventors: Shunyu Zhu, Xiangbin Wu, Zhiyuan Zhang, Xinxin Zhang, Qianying Zhu
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Publication number: 20190332314Abstract: Embodiments of the present disclosure provide devices, techniques, and configurations for network interface controllers (NICs) that log write packets received from a network in non-volatile random access memory (NVRAM). In one embodiment, a NIC includes a network interface to couple a host of the NIC to a network, a NVRAM, and a controller coupled with the network interface and the NVRAM, where the controller is to log write packets received at the network interface from the network in the NVRAM. Other embodiments may be described and/or claimed.Type: ApplicationFiled: December 29, 2016Publication date: October 31, 2019Inventors: Zhiyuan ZHANG, Xiangbin WU, Qianying ZHU, Xinxin ZHANG, Yingzhe SHEN, Haitao JI
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Publication number: 20190310964Abstract: Provided is an apparatus directing to a speculative read mechanism for a distributed storage system. The apparatus includes a remote direct memory access (RDMA) network interface card (RNIC) (100) for a server (250), wherein the RNIC (100) includes an onboard memory (105), a trigger control (120) and a port for connection of the RNIC (100) to a client (200). The onboard memory (105) is operable to provide a buffer (110) for storage of data from a distributed storage system for a read request from the client (200). The trigger control (120) includes a programmable trigger condition. The RNIC (100) is operable to support a speculative read of data in response to a read request snoop of a write of data to the onboard memory (105), and upon detecting the trigger condition, to provide the data in the buffer to the client (200).Type: ApplicationFiled: December 28, 2016Publication date: October 10, 2019Inventors: Zhiyuan ZHANG, Xiangbin WU, Qianying ZHU, Xinxin ZHANG, Haitao JI, Yingzho SHE
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Patent number: 10306673Abstract: A front-end unit that operates within a C-RAN architecture to perform the functions of cellular signal processing and resource selection between an RRU and the BBU pool network is described. The front-end unit supports flexible load migration and CoMP (coordinated multipoint) in the CRAN BBU while also reducing data transmission within the BBU pool network or between the BBU pool network and the RRU.Type: GrantFiled: May 12, 2014Date of Patent: May 28, 2019Assignee: Intel CorporationInventors: Zhiyuan Zhang, Qianying Zhu, Xinxin Zhang, Shunyu Zhu, Xiangbin Wu, Xuebin Yang, Senjie Zhang, Guangjie Li, Xu Zhang
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Patent number: 10277707Abstract: Apparatuses, methods and storage medium associated with a memcached system are disclosed herewith. In embodiments, a client device of the memcached system may include memory and one or more processors coupled with the memory. Further, the client device may include memcached logic configured to receive a request to Get or Set a value corresponding to a key in the memcached system, determine, in response to the receive, whether the key results in a hit in a local cache maintained in memory by the memcached logic, and service the Get or Set request based at least in part on whether a result of the determine indicates the key results in a hit in the local cache. In embodiments, a server of the memcached system may include complement memcached logic to server a Get, Set or an Update request. Other embodiments may be described and/or claimed.Type: GrantFiled: June 26, 2014Date of Patent: April 30, 2019Assignee: Intel CorporationInventors: Xiangbin Wu, Shunyu Zhu, Yingzhe Shen, Tin-Fook Ngai
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Patent number: D988568Type: GrantFiled: April 12, 2022Date of Patent: June 6, 2023Inventor: Xiangbin Wu