Abstract: A repairing method of defective pixels having light spots includes: connecting the pixel electrode and a drain electrode of the of the TFT via a point welding method; cutting off the continuous common electrode to divide the common electrode within the switch area and the common electrode within the pixel area; and removing the pixel electrode arranged above intersections of the common electrode, and connecting the pixel electrode within the switch area and the pixel electrode within pixel area. In addition, an array substrate and a liquid crystal panel are disclosed. By cutting off the common electrode within the pixel area switch area and the pixel area, the defective pixels having light spots are eliminated. In addition, such defective pixels are repaired to be pixels capable of emitting light normally.

Abstract: A TFT array substrate includes parallel data lines parallel extend along a first direction, parallel scan lines crossing the data lines and extending along a second direction perpendicular to the second direction, pixels defined by the data lines and the scan lines, and a common electrode having a main line and growth lines. The main line is parallel to the scan lines. The growth lines extend from the main line. Each pixel includes a pixel electrode, a TFT, partial of the main line, and two growth lines. The TFT is electrically connected to the pixel electrode, a corresponding data line, and a corresponding scan line. The projections of the two growth lines in the pixel overlap with the pixel electrode. Each pixel includes common areas. The common areas overlapping with the two growth lines.

Abstract: The present invention provides a TFT structure and a repair method thereof, a GOA circuit. The TFT structure and the repair method thereof includes a source (10) having a plurality of independent U shape source branches (101). The drain (20) comprises a plurality strip drain branches (201). Each independent U shape source branch (101) is solely connected to a first metal line (30) with a connection part (103), and all the plurality of strip drain branches (201) are electrically coupled to a second metal line (40). The respective independent U shape source branches (101) and the corresponding strip drain branches (201) construct a plurality of independent source-drain conduction channels; as some independent U shape source branch (101) and the corresponding strip drain branch (201) are detected having a defect, the repair can be implemented by disconnecting the independent U shape source branch (101) and disconnecting the corresponding strip drain branch (201).

Abstract: A method for controlling a MIS structure design in a TFT and a system thereof are disclosed. The method comprises: obtaining dielectric constant of silicon nitride in the MIS structure as designed through calculation; and judging whether the dielectric constant of silicon nitride reaches a set value in a TFT manufacturing procedure, wherein if a negative judgment result is obtained, parameters of the MIS structure are adjusted, so as to enable dielectric constant of silicon nitride in the MIS structure after being adjusted to reach the set value in the TFT manufacturing procedure. A MIS structure design can be effectively controlled, thereby improving performance and stability of TFT-LCD products.

Abstract: A repairing method of defective pixels having light spots includes: connecting the pixel electrode and a drain electrode of the of the TFT via a point welding method; cutting off the continuous common electrode to divide the common electrode within the switch area and the common electrode within the pixel area; and removing the pixel electrode arranged above intersections of the common electrode, and connecting the pixel electrode within the switch area and the pixel electrode within pixel area. In addition, an array substrate and a liquid crystal panel are disclosed. By cutting off the common electrode within the pixel area switch area and the pixel area, the defective pixels having light spots are eliminated. In addition, such defective pixels are repaired to be pixels capable of emitting light normally.

Abstract: A structure and a method for obtaining capacitance in an array substrate are disclosed. The structure comprises a first conductive region, arranged in a same layer as a first conductive layer of said array substrate; a second conductive region, arranged in a same layer as a second conductive layer of said array substrate, wherein said second conductive region overlaps with said first conductive region partly or totally; a first measurement region, connected with said first conductive region; and a second measurement region, connected with said second conductive region. The capacitance of the corresponding capacitor of the sub pixel can be detected by the structure, thereby providing data basis for judging the performance and quality of the sub pixel and the liquid crystal display panel.

Abstract: A TFT array substrate includes parallel data lines parallel extend along a first direction, parallel scan lines crossing the data lines and extending along a second direction perpendicular to the second direction, pixels defined by the data lines and the scan lines, and a common electrode having a main line and growth lines. The main line is parallel to the scan lines. The growth lines extend from the main line. Each pixel includes a pixel electrode, a TFT, partial of the main line, and two growth lines. The TFT is electrically connected to the pixel electrode, a corresponding data line, and a corresponding scan line. The projections of the two growth lines in the pixel overlap with the pixel electrode. Each pixel includes common areas. The common areas overlapping with the two growth lines.

Abstract: A method for controlling a MIS structure design in a TFT and a system thereof are disclosed. The method comprises: obtaining dielectric constant of silicon nitride in the MIS structure as designed through calculation; and judging whether the dielectric constant of silicon nitride reaches a set value in a TFT manufacturing procedure, wherein if a negative judgment result is obtained, parameters of the MIS structure are adjusted, so as to enable dielectric constant of silicon nitride in the MIS structure after being adjusted to reach the set value in the TFT manufacturing procedure. A MIS structure design can be effectively controlled, thereby improving performance and stability of TFT-LCD products.

Abstract: A structure and a method for obtaining capacitance in an array substrate are disclosed. The structure comprises a first conductive region, arranged in a same layer as a first conductive layer of said array substrate; a second conductive region, arranged in a same layer as a second conductive layer of said array substrate, wherein said second conductive region overlaps with said first conductive region partly or totally; a first measurement region, connected with said first conductive region; and a second measurement region, connected with said second conductive region. The capacitance of the corresponding capacitor of the sub pixel can be detected by the structure, thereby providing data basis for judging the performance and quality of the sub pixel and the liquid crystal display panel.

Abstract: An array substrate and a display device are disclosed. The present disclosure relates to the technical field of display, whereby the technical problem that the aperture ratio of the pixel unit is affected by the voltage-dividing capacitor in the prior art can be solved. The array substrate comprises a plurality of pixel units, and each of said pixel units comprises a main pixel region, a sub pixel region, a first voltage-dividing capacitor, a driving scanning line, and a voltage-dividing scanning line, wherein the first voltage-dividing capacitor is formed by a voltage-dividing electrode and the driving scanning line that are arranged in an overlapping manner, or by a voltage-dividing electrode and the voltage-dividing scanning line that are arranged in an overlapping manner.

Abstract: The present invention provides a LCD panel and a method for repairing the LCD panel. The LCD panel includes a plurality of data lines and a plurality of subpixel areas. Each subpixel area includes a corresponding pixel electrode and thin film transistor. The subpixel area including a spot defect is electrically connected to a neighboring subpixel area having the same color and in normal operation. The connection between the thin film transistor in the subpixel area including the spot defect and the corresponding data line and the connection between the thin film transistor and the corresponding pixel electrode are cut. Consequently, the subpixel area including the bright spot defect is repaired and able to display normally. The display quality of the LCD panel display is improved. Moreover, the present invention repair method is suitable for the repairing of LCD panels without storage capacitors.

Abstract: The present invention discloses a method for preparing switch transistor comprising: sequentially forming a control electrode, an insulation layer, an active layer, and a source/drain metal layer of the switch transistor on a glass substrate; patterning the source/drain metal layer to expose the active layer; and proceeding an etching process to the exposed active layer in a way of gradually reducing etching rate to form a channel of the switch transistor. The present invention further discloses an equipment for etching the switch transistor. In the way mentioned above, the present invention can minimize the damages to the switch transistor and improve the reliability of the switch transistor.

Abstract: The present invention provides a method for monitoring a contact hole etching process of a TFT substrate, which includes: (1) providing a substrate having a first metal layer and a monitoring machine; (2) providing a target value of reflection rate of the substrate having the first metal layer; (3) applying a masking operation to patternize the first metal layer for forming a gate terminal; (4) forming a gate insulation layer on the gate terminal; and (5) forming a contact hole in the gate insulation layer through etching and simultaneously operating the monitoring machine to measure the reflection rate of a bottom of the contact hole, whereby when the reflection rate of the bottom of the contact hole is substantially equal to the target value, the etching operation is stopped. The variation of reflection rate of the metal layer is monitored to identify if the insulation layer is completely etched away.

Abstract: The present invention relates to a fan-out wiring arrangement of TFT-LCD slim bezel arrangement. The fan-out wiring arrangement includes a first metal layer that is subjected to etching to form parallel first fan-out wires and a second metal layer that is subjected to etching to form parallel second fan-out wires. The first and second metal layers are respectively arranged at upper and lower sides to be parallel to and substantially correspond to each other. The first fan-out wires have line width and fan-out pitch that are identical to those of the second fan-out wires. The first fan-out wires have projections on the second metal layer that are parallel to the second fan-out wires and alternate with the second fan-out wires in an equally spaced manner. The fan-out wiring arrangement realizes wire pitch ?8 ?m, reduces fan-out height, while increasing metal CD, reducing resistance loading, and achieving slim bezel arrangement.

Abstract: The present invention discloses a method for preparing switch transistor comprising: sequentially forming a control electrode, an insulation layer, an active layer, and a source/drain metal layer of the switch transistor on a glass substrate; patterning the source/drain metal layer to expose the active layer; and proceeding an etching process to the exposed active layer in a way of gradually reducing etching rate to form a channel of the switch transistor. The present invention further discloses an equipment for etching the switch transistor. In the way mentioned above, the present invention can minimize the damages to the switch transistor and improve the reliability of the switch transistor.

Abstract: The present invention provides a method for monitoring a contact hole etching process of a TFT substrate, which includes: (1) providing a substrate having a first metal layer and a monitoring machine; (2) providing a target value of reflection rate of the substrate having the first metal layer; (3) applying a masking operation to patternize the first metal layer for forming a gate terminal; (4) forming a gate insulation layer on the gate terminal; and (5) forming a contact hole in the gate insulation layer through etching and simultaneously operating the monitoring machine to measure the reflection rate of a bottom of the contact hole, whereby when the reflection rate of the bottom of the contact hole is substantially equal to the target value, the etching operation is stopped. The variation of reflection rate of the metal layer is monitored to identify if the insulation layer is completely etched away.

Abstract: The present invention relates to a fan-out wiring arrangement of TFT-LCD slim bezel arrangement. The fan-out wiring arrangement includes a first metal layer that is subjected to etching to form parallel first fan-out wires and a second metal layer that is subjected to etching to form parallel second fan-out wires. The first and second metal layers are respectively arranged at upper and lower sides to be parallel to and substantially correspond to each other. The first fan-out wires have line width and fan-out pitch that are identical to those of the second fan-out wires. The first fan-out wires have projections on the second metal layer that are parallel to the second fan-out wires and alternate with the second fan-out wires in an equally spaced manner. The fan-out wiring arrangement realizes wire pitch ?8 ?m, reduces fan-out height, while increasing metal CD, reducing resistance loading, and achieving slim bezel arrangement.

Abstract: The present invention provides a LCD panel and a method for repairing the LCD panel. The LCD panel includes a plurality of data lines and a plurality of subpixel areas. Each subpixel area includes a corresponding pixel electrode and thin film transistor. The subpixel area including a spot defect is electrically connected to a neighboring subpixel area having the same color and in normal operation. The connection between the thin film transistor in the subpixel area including the spot defect and the corresponding data line and the connection between the thin film transistor and the corresponding pixel electrode are cut. Consequently, the subpixel area including the bright spot defect is repaired and able to display normally. The display quality of the LCD panel display is improved. Moreover, the present invention repair method is suitable for the repairing of LCD panels without storage capacitors.