Patents by Inventor Xiangkai SHEN

Xiangkai SHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Array substrate and method for manufacturing the same, and display apparatus
    Patent number: 11901375
    Abstract: An array substrate has a display area and a bonding area located on a side of the display area. The array substrate includes a base, a plurality of first transistors, a plurality of conductive pins and a plurality of conductive electrodes. The plurality of first transistors are disposed on a side of the base and located in the display area; a first transistor includes a first gate, a first source and a first drain. The plurality of conductive pins are disposed on the side of the base and located in the bonding area, and are disposed in a same layer as the first gate. The plurality of conductive electrodes are each disposed on a respective one of surfaces of the plurality of conductive pins away from the base.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: February 13, 2024
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongbo Ju, Pengfei Cui, Jian Sun, Deshuai Wang, Xiangkai Shen, Jianbin Gao, Jiannan Wang, Guangshuai Wang
  • ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME, AND DISPLAY APPARATUS
    Publication number: 20220367530
    Abstract: An array substrate has a display area and a bonding area located on a side of the display area. The array substrate includes a base, a plurality of first transistors, a plurality of conductive pins and a plurality of conductive electrodes. The plurality of first transistors are disposed on a side of the base and located in the display area; a first transistor includes a first gate, a first source and a first drain. The plurality of conductive pins are disposed on the side of the base and located in the bonding area, and are disposed in a same layer as the first gate. The plurality of conductive electrodes are each disposed on a respective one of surfaces of the plurality of conductive pins away from the base.
    Type: Application
    Filed: April 13, 2021
    Publication date: November 17, 2022
    Applicants: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongbo JU, Pengfei CUI, Jian SUN, Deshuai WANG, Xiangkai SHEN, Jianbin GAO, Jiannan WANG, Guangshuai WANG