Patents by Inventor Xiangqian DING

Xiangqian DING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9412760
    Abstract: An array substrate including a base substrate is disclosed; the base substrate is divided into a pixel region and a peripheral circuit region, the pixel region sequentially includes a gate electrode, a gate insulation layer, a semiconductor active layer, a pixel electrode, a source/drain electrode, a passivation layer and a common electrode; the peripheral circuit region sequentially includes a first circuit line, the gate insulation layer, a second circuit line and the passivation layer. An orthogonal projection area of the second circuit line is at least partly overlapped with an orthogonal projection area of the first circuit line on the base substrate, and the second circuit line is directly electrically connected with the first circuit line through a via hole penetrating the gate insulation layer. A method for manufacturing the array substrate and a display device including the array substrate are also disclosed.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 9, 2016
    Assignees: BOE Technology Group Co., Ltd., Beijing BOE Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Zongjie Guo, Xiangqian Ding, Xiaowei Liu, Yao Liu
  • Patent number: 9330888
    Abstract: The present invention discloses a dry etching method. The dry etching method comprises: etching a first medium layer; introducing a second reaction gas in a reaction chamber, and exciting the second reaction gas into plasmas with a second radiofrequency power, so that the plasmas formed from the second reaction gas are combined with particulate pollutants in the reaction chamber, and in this case the reaction chamber is vacuumized to perform conversion processing; and etching a second medium layer. The technical solution of the present invention is capable of effectively preventing particulate pollutants from falling onto the glass substrate in the procedure of executing conversion processing, meanwhile, the effect of chamber purifying through vacuumizing is improved, and the amount of the particulate pollutants in the reaction chamber is effectively reduced.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: May 3, 2016
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Xiangqian Ding, Yao Liu, Xi Chen, Liangliang Li, Jinchao Bai, Xiaowei Liu
  • Publication number: 20150367286
    Abstract: The embodiments of the present disclosure provide an etching liquid storage apparatus and a wet etching device, which relates to the field of display technology, and can reduce the concentration of foreign ions in the etching liquid, so as to avoid frequent replacement of the etching liquid, thereby ensuring stability of the etching process, meanwhile, can also prolong the service life of the etching liquid, so as to reduce the cost; the etching liquid storage apparatus comprises an etching liquid storage tank, an ion exchange membrane for enabling selective permeation of ions in the etching liquid, and an anode or a cathode located at both sides of the ion exchange membrane; wherein a first chamber is formed between the ion exchange membrane and the anode, a second chamber is formed between the ion exchange membrane and the cathode; it is used for manufacture of the wet etching device.
    Type: Application
    Filed: October 22, 2014
    Publication date: December 24, 2015
    Inventors: Liangliang Li, Zongjie Guo, Xiangqian Ding, Yao Liu, Jinchao Bai
  • Publication number: 20150359078
    Abstract: A discharge device and a display panel preparation system based thereon are disclosed. The discharge device includes a conductive contact terminal electrically connected with an electrostatic discharge contactor of a substrate to be processed; and a voltage controller electrically connected to the contact terminal for adjusting a voltage on the contact terminal. The discharge device is able to eliminate (e.g., neutralize) the static electricity on the substrate to be processed.
    Type: Application
    Filed: September 29, 2014
    Publication date: December 10, 2015
    Inventors: Zhichao Zhang, Zongjie Guo, Zheng Liu, Xiangqian Ding, Mingxuan Liu
  • Publication number: 20150325159
    Abstract: An array substrate, a testing method and a manufacturing method of the array substrate are disclosed. The array substrate comprises a first test line (3), a second test line (4), and first data lines (1) and second data lines (2) that are disposed alternately. The first data lines (1) are directly connected to the first test line (3), and the second data lines (2) are connected to the second test line (4) through switch elements (7); or, the second data lines (2) are directly connected to the second test line (4), and the first data lines (1) are connected to the first test line (3) through switch elements (7). With the array substrate, charges in the display region can be avoided from being transferred to a test line, thereby decreasing the accumulation of static electricity, and enhancing reliability of the short bar region.
    Type: Application
    Filed: December 12, 2013
    Publication date: November 12, 2015
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Liangliang LI, Zongjie GUO, Xiangqian DING, Yao LIU, Jinchao BAI
  • Publication number: 20150323483
    Abstract: A detection device includes a chamber for vacuum coating, a capacitance measurement device and a baffle mechanism located in the chamber. The baffle mechanism is a closed structure encompassed by a number of baffle walls, wherein at least one baffle wall includes a fixed baffle plate and a moveable baffle plate. The moveable baffle plate is pivotable about the fixed baffle plate. The moveable baffle plate, after pivoting, may get parallel with an adjacent baffle wall. The adjacent baffle wall and the moveable baffle plate are respectively connected to the capacitance measurement device, and the capacitance measurement device is used to measure the capacitance between the adjacent baffle wall and the moveable baffle plate. The detection device may accurately detect the service life of the baffle mechanism and achieve precise management of the apparatus.
    Type: Application
    Filed: September 25, 2014
    Publication date: November 12, 2015
    Inventors: Xiaowei Liu, Yao Liu, Xiangqian Ding, Jinchao Bai
  • Publication number: 20150311039
    Abstract: The present invention discloses a dry etching method. The dry etching method comprises: etching a first medium layer; introducing a second reaction gas in a reaction chamber, and exciting the second reaction gas into plasmas with a second radiofrequency power, so that the plasmas formed from the second reaction gas are combined with particulate pollutants in the reaction chamber, and in this case the reaction chamber is vacuumized to perform conversion processing; and etching a second medium layer. The technical solution of the present invention is capable of effectively preventing particulate pollutants from falling onto the glass substrate in the procedure of executing conversion processing, meanwhile, the effect of chamber purifying through vacuumizing is improved, and the amount of the particulate pollutants in the reaction chamber is effectively reduced.
    Type: Application
    Filed: July 31, 2014
    Publication date: October 29, 2015
    Inventors: Xiangqian DING, Yao LIU, Xi CHEN, Liangliang LI, Jinchao BAI, Xiaowei LIU
  • Publication number: 20150311222
    Abstract: The present invention provides an array substrate, its manufacturing method, and a display device. The array substrate comprises a gate metal layer, a gate insulating layer, a source/drain metal layer, first common electrode lines arranged on an identical layer to the gate metal layer, a first via hole arranged in the gate insulating layer and corresponding to the first common electrode line, a source/drain metal filling part arranged within the first via hole, a second via hole in communication with the first via hole, and a transparent connection part. The first common electrode lines are, by means of the transparent connection part and the source/drain metal filling part, in electrical connection with each other through the second via hole. According to the present invention, it is able to reduce the depth of the via holes in the array substrate, and improve the uneven diffusion of an alignment layer.
    Type: Application
    Filed: June 20, 2014
    Publication date: October 29, 2015
    Inventors: Jinchao Bai, Yao Liu, Liangliang Li, Xiangqian Ding, Zongjie Guo
  • Patent number: 9165949
    Abstract: The present invention provides an array substrate, its manufacturing method, and a display device. The array substrate comprises a gate metal layer, a gate insulating layer, a source/drain metal layer, first common electrode lines arranged on an identical layer to the gate metal layer, a first via hole arranged in the gate insulating layer and corresponding to the first common electrode line, a source/drain metal filling part arranged within the first via hole, a second via hole in communication with the first via hole, and a transparent connection part. The first common electrode lines are, by means of the transparent connection part and the source/drain metal filling part, in electrical connection with each other through the second via hole. According to the present invention, it is able to reduce the depth of the via holes in the array substrate, and improve the uneven diffusion of an alignment layer.
    Type: Grant
    Filed: June 20, 2014
    Date of Patent: October 20, 2015
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Jinchao Bai, Yao Liu, Liangliang Li, Xiangqian Ding, Zongjie Guo
  • Publication number: 20150228733
    Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device. The array substrate comprises a gate electrode, a gate line, a data line, a gate insulating layer, an active layer, a source electrode and a drain electrode on a substrate. The gate electrode, the gate line and the data line are arranged on an identical layer, the gate line intersects the data line at a right angle, and the data line is disconnected at an intersection with the gate line. The source electrode and the drain electrode are arranged above the gate electrode, the gate line and the data line, and the disconnected data lines are connected via the source electrode.
    Type: Application
    Filed: June 18, 2014
    Publication date: August 13, 2015
    Inventors: Jinchao Bai, Yusheng Xi, Zongjie Guo, Xiangqian Ding, Yao Liu, Liangliang Li
  • Patent number: 8962404
    Abstract: A method for manufacturing fan-out lines on an array substrate is disclosed. The fan-out lines comprise an amorphous silicon layer, an ohmic contact layer and a source-drain electrode layer disposed on a gate insulating layer. The manufacturing processes can be conducted by forming a first layer of photoresist on the source-drain electrode layer and performing a half-exposure development process on the first layer of photoresist; etching the amorphous silicon layer, the ohmic contact layer and the source-drain electrode layer by an etching process; removing the first layer of photoresist; forming a second layer of photoresist and performing full-exposure development process on the second layer of photoresist; and etching the amorphous silicon layer by etching process to form the fan-out lines.
    Type: Grant
    Filed: November 12, 2013
    Date of Patent: February 24, 2015
    Assignees: Boe Technology Group Co., Ltd., Beijing Boe Display Technology Co., Ltd.
    Inventors: Jinchao Bai, Liang Sun, Xiangqian Ding, Liangliang Li, Yao Liu
  • Publication number: 20140134809
    Abstract: A method for manufacturing fan-out lines on an array substrate is disclosed. The fan-out lines comprise an amorphous silicon layer, an ohmic contact layer and a source-drain electrode layer disposed on a gate insulating layer. The manufacturing processes can be conducted by forming a first layer of photoresist on the source-drain electrode layer and performing a half-exposure development process on the first layer of photoresist; etching the amorphous silicon layer, the ohmic contact layer and the source-drain electrode layer by an etching process; removing the first layer of photoresist; foiming a second layer of photoresist and performing full-exposure development process on the second layer of photoresist; and etching the amorphous silicon layer by etching process to form the fan-out lines.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 15, 2014
    Applicants: BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Jinchao BAI, Liang SUN, Xiangqian DING, Liangliang LI, Yao LIU