Patents by Inventor Xiangying WU

Xiangying WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11924184
    Abstract: The present application relates to devices and components including apparatus, systems, and methods for secured user equipment communications over a user equipment relay. In some embodiments, symmetric or asymmetric encryption may be used for the secured user equipment communications.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: March 5, 2024
    Assignee: Apple Inc.
    Inventors: Shu Guo, Fangli Xu, Yuqin Chen, Xiangying Yang, Huarui Liang, Haijing Hu, Chunhai Yao, Dawei Zhang, Yushu Zhang, Zhibin Wu
  • Patent number: 8718987
    Abstract: Provided is a circuit simulation model that can suitably represent capacitor characteristics, thereby realizing accurate circuit design and circuit analysis. A SPICE model is constituted of a capacitor unit in which a capacitor is replaced with a linear voltage dependent current source, a low-pass filter unit that has a function of extracting a DC bias voltage, a calculation circuit unit that is configured by combining an adder, a multiplier, and the like to perform a calculation of a circuit equation derived from an equivalent circuit for a capacitor such as an idealized C circuit model, an RC circuit model, or the like, and a linear voltage dependent voltage source that applies a total voltage applied across the capacitor to the calculation circuit.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: May 6, 2014
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Xiangying Wu
  • Patent number: 8527256
    Abstract: Improved equivalent circuits and circuit analysis using the same for a multilayer capacitor are provided. In one aspect, the equivalent series capacitance C and part of the equivalent series resistance R of a basic equivalent circuit for a multilayer chip capacitor are replaced with a capacitance CO, and capacitances Cm and C1 and the resistance Rc1 to take into consideration abnormal characteristics in electromagnetic distribution that occur at the corners and edges of the internal electrodes in the multilayer chip capacitor. In one aspect, additional circuit elements, such as resistances Rp1 and Rp2, the capacitance Cp, the inductances Lm and L1, and the resistance RL1, are provided to take into consideration the skin effects of the internal electrodes within the multilayer chip capacitor, electromagnetic proximity effects, losses and parasitic capacitance of the dielectric material, as well as parasitic inductance of the external electrodes.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: September 3, 2013
    Assignee: Taiyo Yuden Co., Ltd.
    Inventor: Xiangying Wu
  • Publication number: 20120185223
    Abstract: Provided is a circuit simulation model that can suitably represent capacitor characteristics, thereby realizing accurate circuit design and circuit analysis. A SPICE model is constituted of a capacitor unit in which a capacitor is replaced with a linear voltage dependent current source, a low-pass filter unit that has a function of extracting a DC bias voltage, a calculation circuit unit that is configured by combining an adder, a multiplier, and the like to perform a calculation of a circuit equation derived from an equivalent circuit for a capacitor such as an idealized C circuit model, an RC circuit model, or the like, and a linear voltage dependent voltage source that applies a total voltage applied across the capacitor to the calculation circuit.
    Type: Application
    Filed: January 13, 2012
    Publication date: July 19, 2012
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Xiangying WU
  • Publication number: 20110313749
    Abstract: The occurrence of errors between circuit design using a circuit simulator and the actual circuit performance is quite adequately suppressed. Mutual inductance (Lm) between direct current inductance (L0) and inductance (L1) is connected in parallel to a series circuit of the inductance (L1) and resistance (R1), the series circuit taking the skin effect of an inner conductor into consideration and the inductance (L0), and direct current resistance (Rdc1) of the inner conductor are connected in series to the series circuit to which the mutual inductance (Lm) is connected in parallel. Then, parasitic inductance (Ls) of an external electrode is connected in series to the equivalent inductance (L0), and direct current resistance (Rdc2) of the external electrode is connected in series to the direct current resistance (Rdc1) of the inner conductor.
    Type: Application
    Filed: February 24, 2010
    Publication date: December 22, 2011
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Xiangying Wu
  • Publication number: 20110307235
    Abstract: Improved equivalent circuits and circuit analysis using the same for a multiplayer capacitor are provided. In one aspect, the equivalent series capacitance C and part of the equivalent series resistance R of a basic equivalent circuit for a multiplayer chip capacitor are replaced with a capacitance CO, and capacitances Cm and C1 and the resistance Rc1 to take into consideration abnormal characteristics in electromagnetic distribution that occur at the corners and edges of the internal electrodes in the multilayer chip capacitor. In one aspect, additional circuit elements, such as resistances Rp1 and Rp2, the capacitance Cp, the inductances Lm and L1, and the resistance RL1, are provided to take into consideration the skin effects of the internal electrodes within the multilayer chip capacitor, electromagnetic proximity effects, losses and parasitic capacitance of the dielectric material, as well as parasitic inductance of the external electrodes.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 15, 2011
    Applicant: TAIYO YUDEN CO., LTD.
    Inventor: Xiangying WU