Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

Abstract: A memory device includes an interface to communicate with a host, an array of memory cells, and a controller. The controller is configured to access the array of memory cells in response to commands from the host. The controller is further configured to enter an idle time in response to no commands from the host with queue empty, receive a first command from the host, and exit the idle time in response receiving a second command from the host. The controller is further configured to for a plurality of idle times, generate a history indicating a length of each idle time. The controller is further configured to predict the length of a subsequent idle time based on the history.

Abstract: A memory sub-system includes a memory sub-system controller comprising a plurality of controller channels, one or more memory devices, each of which comprises a respective plurality of memory dies, and a channel switch circuit coupled between the plurality of the controller channels and a plurality of memory channels of the one or more memory devices, where each memory channel corresponds to a respective one of the plurality of memory dies of one of the memory devices, the channel switch circuit comprising command processing logic configured to: receive, from the memory sub-system controller, a plurality of channel mappings, each of which identifies a particular one of the controller channels and a particular one of the memory channels, and route data from each controller channel to a respective one of the memory channels that is associated with the controller channel by a respective one of the channel mappings.

Abstract: Memory with switchable channels is disclosed herein. In one embodiment, a system comprises a controller, a plurality of memory dies, and a switch matrix. The switch matrix is coupled to the controller via two or more controller-side channels, and to the plurality of memory dies via a set of memory-side channels. The switch matrix is configured to selectively couple each controller-side channel of the two or more controller-side channels to each memory-side channel of the set of memory-side channels to provide dynamically configurable connections between the controller and one or more memory dies of the plurality of memory dies.

Abstract: A subset of blocks from a set of blocks of a memory device are identified based on a valid data count constraint. A first block from the subset of blocks is selected based on a valid data count of the first block. A second block from the subset of blocks is selected based on a data temperature of the second block. A comparison of the first block and the second block is performed in accordance with one or more comparison criterion. The first block or the second block is selected as a garbage collection source block based on the comparison. Garbage collection is performed at the garbage collection source block.

Abstract: A method includes receiving first data, determining a number of programming operations performed on a plurality of flash memory cells subsequent to a most recent erase operation performed on the plurality of flash memory cells, encoding the first data to provide a first write-once memory (WOM) encoded data, and storing the first WOM encoded data, based at least in part on the determined number of programming operations, within a number of the plurality of flash memory cells.

Abstract: Operations include establishing a queue storing a list of data burst commands to be communicated via a multiplexed interface coupled to the set of memory dies, communicating, during a first time period, a first data burst command in the queue to a first memory die of the set of memory dies via the multiplexed interface, and communicating, during a second time period, a second data burst command in the queue to a second memory die of the set of memory dies via the multiplexed interface, where a first latency associated with the first data burst command occurs during the second time period.

Abstract: Increases in efficiency of storage device operation may be realized if the limited number of available high-priority communication channels are better optimized and assigned among hosts that may best utilize them. This assignment can occur in response to an evaluation of the overall zone usage or by received metadata and/or indicia from the host. The storage device may periodically, or in response to a command, reevaluate the assigned priority status of each communication channel and associated host/zone pair. For example, the storage device may demote or remove a communication channel from high-priority to low-priority. This process can be continued during a preconfigured time window which can be adjusted before, during, or after priority evaluation. The continuous operation of this process can allow for adjustments being made to priority levels within the storage device that may further increase total operational efficiency.

Abstract: A method, an apparatus, and a system for time synchronization based on in-band telemetry are disclosed. The method includes: acquiring an estimated value of delay in a first transmission direction and an estimated value of delay in a second transmission direction; wherein the estimated value of delay in the first transmission direction is determined according to multiple delay samples in the first transmission direction, and the estimated value of delay in the second transmission direction is determined according to multiple delay samples in the second transmission direction, the first transmission direction is a direction from a second device to a first device, and the second transmission direction is vice versa; and determining a time system error of the first device relative to the second device according to the estimated value of delay in the first transmission direction and the estimated value of delay in the second transmission direction.

Abstract: A method performed by a processor to improve wear-leveling in a cross-point (X3D) memory, comprises detecting, by a processor coupled to the X3D memory, a trigger event, wherein the X3D memory comprises a first section of memory units and a second section of memory units, and in response to detecting the trigger event, relocating, by the processor, data stored in a first memory unit of the first section of memory units to a memory unit adjacent to a last memory unit of the first section of memory units, and relocating, by the processor, data stored in a first memory unit of the second section of memory units to a memory unit adjacent to a last memory unit of the second section of memory units.

Abstract: Increases in efficiency of storage device operation may be realized if the limited number of available high-priority communication channels are better optimized and assigned among hosts that may best utilize them. This assignment can occur in response to an evaluation of the overall zone usage or by received metadata and/or indicia from the host. The storage device may periodically, or in response to a command, reevaluate the assigned priority status of each communication channel and associated host/zone pair. For example, the storage device may demote or remove a communication channel from high-priority to low-priority. This process can be continued during a preconfigured time window which can be adjusted before, during, or after priority evaluation. The continuous operation of this process can allow for adjustments being made to priority levels within the storage device that may further increase total operational efficiency.

Abstract: A method, an apparatus, and a system for time synchronization based on in-band telemetry are disclosed. The method includes: acquiring an estimated value of delay in a first transmission direction and an estimated value of delay in a second transmission direction; wherein the estimated value of delay in the first transmission direction is determined according to multiple delay samples in the first transmission direction, and the estimated value of delay in the second transmission direction is determined according to multiple delay samples in the second transmission direction, the first transmission direction is a direction from a second device to a first device, and the second transmission direction is vice versa; and determining a time system error of the first device relative to the second device according to the estimated value of delay in the first transmission direction and the estimated value of delay in the second transmission direction.

Abstract: Increases in efficiency of storage device operation may be realized if the limited number of available high-priority communication channels are better optimized and assigned among hosts that may best utilize them. This assignment can occur in response to an evaluation of the overall zone usage or by received metadata and/or indicia from the host. The storage device may periodically, or in response to a command, reevaluate the assigned priority status of each communication channel and associated host/zone pair. For example, the storage device may demote or remove a communication channel from high-priority to low-priority. This process can be continued during a preconfigured time window which can be adjusted before, during, or after priority evaluation. The continuous operation of this process can allow for adjustments being made to priority levels within the storage device that may further increase total operational efficiency.

Abstract: A steeply-inclined ultra-thick coal seam gas control method based on a binary composite liquid. The method includes taking a clean fracturing fluid system and a microemulsion as a binary composite liquid. The method includes injecting the binary composite liquid into a coal mass by means of a main hydraulic fracturing and permeability improvement method of hydraulic fracturing and water jet slotting to form a coal mass gas extraction system of binary composite liquid fracturing and permeability improvement. The method includes investigating and analyzing a gas control effect of the steeply-inclined ultra-thick coal seam according to change characteristics and analysis of gas extraction flow rate, change characteristics and analysis of permeability coefficient of coal seam, change characteristics and analysis of gas natural desorption speed of coal mass, change characteristics and analysis of gas concentration of return air flow of working face and theoretical analysis of drilling cuttings index.

Abstract: A steeply-inclined ultra-thick coal seam gas control method based on a binary composite liquid. The method includes taking a clean fracturing fluid system and a microemulsion as a binary composite liquid. The method includes injecting the binary composite liquid into a coal mass by means of a main hydraulic fracturing and permeability improvement method of hydraulic fracturing and water jet slotting to form a coal mass gas extraction system of binary composite liquid fracturing and permeability improvement. The method includes investigating and analyzing a gas control effect of the steeply-inclined ultra-thick coal seam according to change characteristics and analysis of gas extraction flow rate, change characteristics and analysis of permeability coefficient of coal seam, change characteristics and analysis of gas natural desorption speed of coal mass, change characteristics and analysis of gas concentration of return air flow of working face and theoretical analysis of drilling cuttings index.

Abstract: A type of data relocation to perform on a group of solid state storage cells is selected from a group that includes garbage collection and wear leveling. Source blocks in the group of solid state storage cells are identified using the selected type of data relocation. The source blocks are read in order to obtain relocated data and the relocated data is stored in an open block in the group of solid state storage cells. Relocated data associated with the selected type of data relocation is stored in the open block and relocated data associated with the unselected type of data relocation is excluded from the open block.

Abstract: A storage device implements a method for garbage collection. The storage device arranges data blocks of a storage medium into a bin and determines first coldness of a first data block in the bin and second coldness of a second data block in the bin that are respectively associated with a first rate of change of valid data in the first data block into invalid data and a second rate of change of valid data in the second data block into invalid data. Based on the first coldness and the second coldness, the storage device selects a colder data block from the first and second data blocks as a garbage data block. Because the valid data in the selected garbage data block are more stable, they may cause less new stale data or garbage data in a new block to which the valid data are moved.

Abstract: A memory system include a memory device including a plurality of blocks, each of the blocks having a plurality of pages, and a controller suitable for determining valid pages from among the plurality of pages based on data temperature, and performing a garbage collection process based on a number of valid pages and data temperature of the valid pages.

Abstract: Memory systems may include a memory including a plurality of blocks, and a controller suitable for determining a pool of blocks from the plurality of blocks as garbage collection (GC) victim block candidates based on a number of valid pages left in each of the plurality of blocks, and selecting a block from the pool of blocks having a minimum number of valid pages as a victim block for garbage collection.

Abstract: A charge constrained bit sequence is processed to obtain a lower bound on a number of bit errors associated with the charge constrained bit sequence. The lower bound is compared against an error correction capability threshold associated with an error correction decoder. In the event the lower bound is greater than or equal to the error correction decoder threshold, an error correction decoding failure is predicted.