Abstract: The present invention provides a shift register and a method for driving the same, a gate driving circuit and a display device, and belongs to the field of display technology. The shift register of the present invention includes an input module, an output pulling-up module and a reset-and-noise-reducing module, wherein the input module is connected to a signal input terminal, a second clock signal input terminal, a power supply voltage terminal and a pulling-up node, the output pulling-up module is connected to a first clock signal input terminal, the pulling-up node and a signal output terminal, and the reset-and-noise-reducing module is connected to the second clock signal input terminal, a reset signal input terminal, a low voltage terminal, the pulling-up node and the signal output terminal. The shift register of the present invention has a simple structure, thereby facilitating the implementation of a narrow-bezel display device.

Abstract: An array substrate, a LCD panel and a display device are disclosed. The array substrate includes: a substrate, a plurality of pixels disposed on the substrate and defined by a plurality of gate lines and a plurality of data lines. A common electrode and a pixel electrode are disposed in each pixel region. Two pixels at adjacent rows in a same column form a pixel set. A first gate line and a second gate line are disposed between the two pixels of the pixel set. The data line is disposed on the same side of the two pixels. A first switch transistor and a third switch transistor are disposed in one pixel region of the pixel set and at least a second switch transistor is disposed in the other pixel region.

Abstract: The disclosure relates to a shift register, a method for driving the same, an array substrate and a display apparatus, for reducing the wiring space as required by the shift register.

Abstract: The present invention provides a shift register and a driving method thereof, a driving circuit, and a display device, the shift register includes an input unit, an output unit and a reset unit, the input unit controls potential of a first node according to input signals of an input terminal and a first voltage terminal, the output unit controls an output signal of an output terminal according to input signals of the input terminal and a clock signal terminal under the control of the potential of the first node, and the reset unit controls potential of a second node according to input signals of a reset terminal and a second voltage terminal.

Abstract: The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes an input end, a gate driving signal output end, a reset end, a pull-up transistor, a pull-down transistor, a pull-down node control module and a pull-up node control module. The pull-down node control module is configured to turn on the pull-down transistor at a first noise reduction stage so as to enable the gate driving signal output end to output a low level, and pull down the pull-down node to be at a low level at a second noise reduction stage. The pull-up node control module is configured to pull down the pull-up node to be at a low level at the first noise reduction stage and the second noise reduction stage, so as to turn off the pull-up transistor.

Abstract: The present disclosure provides a bi-directional scanning gate driver and its shift register unit. The shift register unit comprises a shift trigger signal/reset signal input terminal (1), a reset signal/shift trigger signal input terminal (2), the first clock terminal (6) and an output terminal (8). The shift trigger signal/reset signal input terminal (1) and the reset signal/shift trigger signal input terminal (2) are coupled to one of the shift trigger signal and the reset signal. When it is switched between the forward shift and the reverse shift, the signals coupled to the shift trigger signal/reset signal input terminal (1) and the reset signal/shift trigger signal input terminal (2) are exchanged. The first clock terminal (6) is coupled to a clock signal for providing a driving level to the output terminal (8). The circuit of such a shift register unit is constituted of at least four transistors and one capacitor.

Abstract: The present disclosure provides a pixel structure for driving the pixel structure, a display panel and a display device. The pixel structure includes M gate lines, N data lines, and pixel units arranged in an array of M rows and N columns. Each pixel unit includes a pixel electrode and a thin film transistor (TFT), a drain electrode of the TFT is connected to the pixel electrode. Both M and N are positive integers. Source electrodes of the TFTs included in two adjacent pixel units in each row of the array are connected to two adjacent data lines respectively, and source electrodes of the TFTs included in two adjacent pixel units in each column of the array are connected to two adjacent data lines respectively.

Abstract: The present invention discloses a touch panel and a display device. The touch pattern of the touch panel comprises multiple columns of touch units, each column of touch unit comprises a transmitting column and a receiving column arranged oppositely and insulated mutually, the transmitting column comprises a plurality of transmitters, the receiving column comprises a plurality of receivers, and one transmitter in the transmitting column corresponds to N receivers sequentially arranged in the receiving column, wherein N is an integer larger than 2. The touch panel provided by the present invention adopts a mode that one transmitter corresponds to a plurality of receivers, so that the quantity of pins of the touch panel can be reduced. The length of a flexible printed circuit board bound with the touch panel is also reduced, which reduces the cost and improve the binding yield of the flexible printed circuit board.

Abstract: Provided are a gate driving circuit, a display module and a display device belonging to the field of display technique and being designed for solving the problem of high power consumption of the display module in the prior art. The gate driving circuit is used for driving gates of TFTs corresponding to gate lines connected thereto, and includes at least two stages of shift registers connected in cascade, wherein each stage of shift register includes a first output terminal and a second output terminal, the first output terminal is connected to an enable signal input terminal of a next stage of shift register so as to output a next stage enable signal to the next stage of shift register, and the second output terminal is connected to a corresponding gate line so as to apply a gate driving signal on the gates of TFTs through the corresponding gate line.

Abstract: The present disclosure discloses a gate driving circuit including multi-stage shift registers, and an output side switch element which is controlled by the second clock signal to be turned on or off. The output side switch element is located between an input terminal and an output terminal of each stage shift register. An output terminal of the (N+2)-th stage shift register is coupled to a reset terminal of the N-th stage shift register.

Abstract: A display panel comprises: a set of gate lines; and a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively. A flat panel display apparatus comprises: a set of gate lines; a set of data lines and a set of transmission lines extending in substantially the same direction, the set of transmission lines being electrically connected to the set of gate lines, respectively; and a control circuit electrically connected to the set of data lines and the set of transmission lines.

Abstract: An array substrate and a display device are disclosed. The array substrate includes a base substrate, a transmitting touch electrode pattern and a receiving touch electrode pattern; the transmitting touch electrode pattern is formed on a first face of the base substrate, the receiving touch electrode pattern is formed on a second face of the base substrate, and the first face and the second face are opposite to each other. With the array substrate, shadows of the transmitting touch electrode pattern and the receiving touch electrode pattern can be eliminated or alleviated, and the transmitting touch electrode pattern and the receiving touch electrode pattern can be avoided from being scratched.

Abstract: Provided are a gate driving circuit, a display module and a display device belonging to the field of display technique and being designed for solving the problem of high power consumption of the display module in the prior art. The gate driving circuit is used for driving gates of TFTs corresponding to gate lines connected thereto, and includes at least two stages of shift registers connected in cascade, wherein each stage of shift register includes a first output terminal and a second output terminal, the first output terminal is connected to an enable signal input terminal of a next stage of shift register so as to output a next stage enable signal to the next stage of shift register, and the second output terminal is connected to a corresponding gate line so as to apply a gate driving signal on the gates of TFTs through the corresponding gate line.

Abstract: A shift register unit includes an input end, a gate driving signal output end, a resetting end, a pull-up transistor, a pull-down transistor, a pull-down node control module, a pull-up node control module and an output noise reduction transistor. The pull-down node control module is configured to pull up a potential of a pull-down node to a high potential at a first noise reduction stage, so as to turn on the pull-down transistor and enable the gate driving signal output end to output a low level. The pull-up node control module is configured to pull down a potential of the pull-up node to a low potential at a resetting stage, and maintain the potential of the pull-up node to be at a low potential at the first noise reduction stage and a second noise reduction stage, so as to turn off the pull-up transistor.

Abstract: A display panel and a display device comprising a pixel area (A) and a peripheral wiring area, wherein detection switches are arranged between the pixel area (A) and the peripheral wiring area, the detection switches correspond to gate lines (11) and/or data lines (10) of the pixel area (A) one to one, and the detection switches are configured to control connection and disconnection of the pixel area (A) and the peripheral wiring area. In the display panel, it is possible to precisely and quickly detect whether there is a short-circuit or open-circuit defect and the precise position of the defect. It is only required to perform an inching detection on signal lines in a small area during the detection procedure, which saves detection time and improves detection efficiency.

Abstract: A shift register unit includes a gate driving signal output end, an input end, a reset end, a clock signal end, a pull-up transistor, a pull-down transistor, a pull-down node control module and a pull-up node control module. The pull-down node control module is configured to control a pull-down node to be at a low potential at an input stage, control the pull-down transistor to be in an off state at an output stage, pull up the potential of the pull-down transistor at a reset stage, and control the pull-down transistor to be in the on state at a maintenance stage, so as to enable the gate driving signal output end to output a low level.

Abstract: A shift register unit and a gate drive apparatus are disclosed. The shift register unit comprises a pre-charge module configured to provide a voltage of a first voltage source to a first node under the control of an input signal from the signal input terminal, the first node being an output node of the pre-charge module; a pull-up module, and configured to provide a clock signal from a first clock signal terminal to a signal output terminal under the control of a voltage of the first node; a reset module configured to provide a voltage of a second voltage source to the first node under the control of an input signal from a reset signal terminal; and a pull-down module configured to maintain the first node and the signal output terminal at a low level during non-operating time of the shift register unit.

Abstract: There is provided a shift register unit and driving method for the shift register unit, a shift register and a display device.

Abstract: The present invention discloses a capacitor for a TFT array substrate and a method of manufacturing the same, and the present invention further discloses a shift register, a gate driver, an array substrate and a display device using the capacitor. The TFT array substrate comprises a TFT gate layer, a gate insulation layer, a first ITO layer, a TFT active layer, a TFT source-drain layer, a passivation layer and a second ITO layer formed sequentially on a glass substrate, and the capacitor is consisted of the first ITO layer, the passivation layer and the second ITO layer. In addition, the second ITO layer is connected with the TFT gate layer in a region where the capacitor is located, thereby forming two capacitors connected in parallel; or, the first ITO layer is connected with the TFT gate layer in the region where the capacitor is located, thereby also forming two capacitors connected in parallel.

Abstract: A gate driving circuit, a display device, and a driving method are disclosed in the present invention. The gate driving circuit comprises: a plurality of cascaded shift register units and a control unit, wherein every two adjacent shift register units constitute a shift register set and are connected to two gate lines through the control unit, and wherein the control unit controls the shift register units of the shift register set to supply drive signals to the two gate lines, respectively. Embodiments of the present invention improve a configuration of the circuit on the basis of original shift registers, thereby achieving compensation of charge rations between different frames and effectively alleviating phenomena of apparent bright/dark lines such as the vertical lines of the existing products.