Patents by Inventor Xianmin Yi

Xianmin Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200235158
    Abstract: A sensor includes a photodiode disposed in a semiconductor material to receive light and convert the light into charge, and a first floating diffusion coupled to the photodiode to receive the charge. A second floating diffusion is coupled to the photodiode to receive the charge, and a first transfer transistor is coupled to transfer the charge from the photodiode into the first floating diffusion. A second transfer transistor is coupled to transfer the charge from the photodiode into the second floating diffusion, and an inductor is coupled between a first gate terminal of the first transfer transistor and a second gate terminal of the second transfer transistor. The inductor, the first gate terminal, and the second gate terminal form a resonant circuit.
    Type: Application
    Filed: January 23, 2019
    Publication date: July 23, 2020
    Inventors: Xianmin Yi, Jingming Yao, Philip Cizdziel, Eric Webster, Duli Mao, Zhiqiang Lin, Jens Landgraf, Keiji Mabuchi, Kevin Johnson, Sohei Manabe, Dyson H. Tai, Lindsay Grant, Boyd Fowler
  • Patent number: 9865642
    Abstract: A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: January 9, 2018
    Assignee: OmniVision Technologies, Inc.
    Inventors: Zhenhong Fu, Dajiang Yang, Xianmin Yi, Gang Chen, Sing-Chung Hu, Duli Mao
  • Publication number: 20170359545
    Abstract: An image sensor pixel having a hybrid transfer storage gate-storage diode storage node is disclosed herein. An example image sensor includes a photodiode, a storage diode, a transfer gate, and a buried storage well. The photodiode, storage diode, and buried storage well are all disposed in a semiconductor material. The transfer storage gate may be disposed on a surface of the semiconductor material between the photodiode and the storage diode. Further, the buried storage well may be disposed under the storage diode and partially under the transfer storage gate. Additionally, a length of the transfer storage gate and a length of the storage diode may be equal, and the storage diode may passivate a surface of the semiconductor material between the transfer storage gate and an output gate.
    Type: Application
    Filed: June 14, 2016
    Publication date: December 14, 2017
    Inventor: Xianmin Yi
  • Patent number: 9843754
    Abstract: An image sensor pixel having a hybrid transfer storage gate-storage diode storage node is disclosed herein. An example image sensor includes a photodiode, a storage diode, a transfer gate, and a buried storage well. The photodiode, storage diode, and buried storage well are all disposed in a semiconductor material. The transfer storage gate may be disposed on a surface of the semiconductor material between the photodiode and the storage diode. Further, the buried storage well may be disposed under the storage diode and partially under the transfer storage gate. Additionally, a length of the transfer storage gate and a length of the storage diode may be equal, and the storage diode may passivate a surface of the semiconductor material between the transfer storage gate and an output gate.
    Type: Grant
    Filed: June 14, 2016
    Date of Patent: December 12, 2017
    Assignee: OmniVision Technologies, Inc.
    Inventor: Xianmin Yi
  • Publication number: 20160358969
    Abstract: A front-side-interconnect (FSI) red-green-blue-infrared (RGB-IR) photosensor array has photosensors of a first type with a diffused N-type region in a P-type well, the P-type well diffused into a high resistivity semiconductor layer; photosensors of a second type, with a deeper diffused N-type region in a P-type well, the P-type well; and photosensors of a third type with a diffused N-type region diffused into the high resistivity semiconductor layer underlying all of the other types of photosensors. In embodiments, photosensors of a fourth type have a diffused N-type region in a P-type well, the N-type region deeper than the N-type region of photosensors of the first and second types.
    Type: Application
    Filed: June 5, 2015
    Publication date: December 8, 2016
    Inventors: Zhenhong Fu, Dajiang Yang, Xianmin Yi, Gang Chen, Sing-Chung Hu, Duli Mao
  • Patent number: 9472587
    Abstract: A storage transistor with a storage region is disposed in a semiconductor material. A gate electrode is disposed in a bottom side of an interlayer proximate to the storage region, and a dielectric layer is disposed between the storage region and the gate electrode. An optical isolation structure is disposed in the interlayer and the optical isolation structure extends from a top side of the interlayer to the gate electrode. The optical isolation structure is also adjoining a perimeter of the gate electrode and contacts the gate electrode. A capping layer is disposed proximate to the top side of the interlayer and the capping layer caps a volume encircled by the optical isolation structure.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: October 18, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventors: Yuanwei Zheng, Xianmin Yi, Gang Chen, Duli Mao, Dyson H. Tai
  • Patent number: 9461088
    Abstract: An image sensor pixel includes a photodiode, a first storage node, a second storage node, a first transfer storage gate, a second transfer storage gate, a floating diffusion, and an output gate. The photodiode is for generating image charge in response to image light. The first storage node, the second storage node, and the photodiode have a first doping polarity. The first transfer storage gate is coupled to transfer the image charge from the photodiode to the first storage node. The first transfer storage gate is disposed over a majority portion of the first storage node. The second transfer storage gate is coupled to transfer the image charge from the first storage node to the second storage node. The second transfer storage gate is disposed over a majority portion of the second storage node. The output gate transfers the image charge from the second storage node to the floating diffusion.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: October 4, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventor: Xianmin Yi
  • Publication number: 20160218132
    Abstract: A storage transistor with a storage region is disposed in a semiconductor material. A gate electrode is disposed in a bottom side of an interlayer proximate to the storage region, and a dielectric layer is disposed between the storage region and the gate electrode. An optical isolation structure is disposed in the interlayer and the optical isolation structure extends from a top side of the interlayer to the gate electrode. The optical isolation structure is also adjoining a perimeter of the gate electrode and contacts the gate electrode. A capping layer is disposed proximate to the top side of the interlayer and the capping layer caps a volume encircled by the optical isolation structure.
    Type: Application
    Filed: January 27, 2015
    Publication date: July 28, 2016
    Inventors: Yuanwei Zheng, Xianmin Yi, Gang Chen, Duli Mao, Dyson H. Tai
  • Publication number: 20160155768
    Abstract: An image sensor pixel includes a photodiode, a first storage node, a second storage node, a first transfer storage gate, a second transfer storage gate, a floating diffusion, and an output gate. The photodiode is for generating image charge in response to image light. The first storage node, the second storage node, and the photodiode have a first doping polarity. The first transfer storage gate is coupled to transfer the image charge from the photodiode to the first storage node. The first transfer storage gate is disposed over a majority portion of the first storage node. The second transfer storage gate is coupled to transfer the image charge from the first storage node to the second storage node. The second transfer storage gate is disposed over a majority portion of the second storage node. The output gate transfers the image charge from the second storage node to the floating diffusion.
    Type: Application
    Filed: December 1, 2014
    Publication date: June 2, 2016
    Inventor: Xianmin Yi
  • Patent number: 9305952
    Abstract: An image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode and associated pixel circuits formed in a semiconductor substrate. Buried light shields may be formed on the substrate to present pixel circuitry that is formed in the substrate between two adjacent photodiodes from being exposed to incoming light. Metal interconnect muting structures may be formed over the buried light shields. In one embodiment, light blocking structures may be formed to completely seal the interconnect routing structures. The light blocking structures may be formed on top of the buried light shields or on the surface of the substrate. In another embodiment, planar light blocking structures that are parallel to the surface of the substrate may be formed between metal routing layers to help absorb stray light. Light blocking structures formed in these ways can help reduce optical crosstalk and enhance global shutter efficiency.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: April 5, 2016
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Patent number: 9294693
    Abstract: An image sensor includes a plurality of photodiodes arranged into an array of rows and columns. The photodiodes are grouped into pixel units, where each pixel unit includes at least four photodiodes and shared pixel unit circuitry coupled to each of the four photodiodes. In one aspect the shared pixel unit circuitry may include a shared source follower transistor. In another aspect the shared pixel unit circuitry includes a shared reset transistor. Two of the photodiodes of the pixel unit are in a first column of the array and another two of the photodiodes are in a second column of the array. One of the photodiodes in the second column is in a row that is between rows of the two photodiodes in the first column.
    Type: Grant
    Filed: October 24, 2014
    Date of Patent: March 22, 2016
    Assignee: OmniVision Technologies, Inc.
    Inventor: Xianmin Yi
  • Patent number: 9129872
    Abstract: A photodiodes may be formed on a substrate such as an imager substrate. The photodiode may include first and second layers in the substrate that form a p-n junction. The first layer may have a first doping type such as p-type doping, whereas the second layer may have a second, opposite doping type such as n-type doping. A counter-doping implant region may be provided that only partially overlaps with the second layer of the photodiode. The counter-doping implant region may have an opposite doping type to the second layer and may have a dopant concentration that is less than the dopant concentration of the second layer. The counter-doping implant region may extend into a third layer of the substrate that may have the same doping type of the second layer but at a lower concentration than the counter-doping implant region.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: September 8, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Xianmin Yi, Paul Perez
  • Publication number: 20150062392
    Abstract: An image sensor with an array of image sensor pixels is provided. Each pixel may include a photodiode and associated pixel circuits formed in a semiconductor substrate. Buried light shields may be formed on the substrate to present pixel circuitry that is formed in the substrate between two adjacent photodiodes from being exposed to incoming light. Metal interconnect muting structures may be formed over the buried light shields. In one embodiment, light blocking structures may be formed to completely seal the interconnect routing structures. The light blocking structures may be formed on top of the buried light shields or on the surface of the substrate. In another embodiment, planar light blocking structures that are parallel to the surface of the substrate may be formed between metal routing layers to help absorb stray light. Light blocking structures formed in these ways can help reduce optical crosstalk and enhance global shutter efficiency.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 5, 2015
    Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Patent number: 8890221
    Abstract: A backside illuminated image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a front surface of a semiconductor substrate. Silicon inner microlenses may be formed on a back surface of the semiconductor substrate. In particular, positive inner microlenses may be formed over the photodiodes, whereas negative inner microlenses may be formed over the associated pixel circuits. Buried light shielding structures may be formed over the negative inner microlenses to prevent pixel circuitry that is formed in the substrate between two neighboring photodiodes from being exposed to incoming light. The buried light shielding structures may be lined with absorptive antireflective coating material to prevent light from being reflected off the surface of the buried light shielding structures.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: November 18, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Publication number: 20140085517
    Abstract: A backside illuminated image sensor with an array of image sensor pixels is provided. Each image pixel may include a photodiode and associated pixel circuits formed in a front surface of a semiconductor substrate. Silicon inner microlenses may be formed on a back surface of the semiconductor substrate. In particular, positive inner microlenses may be formed over the photodiodes, whereas negative inner microlenses may be formed over the associated pixel circuits. Buried light shielding structures may be formed over the negative inner microlenses to prevent pixel circuitry that is formed in the substrate between two neighboring photodiodes from being exposed to incoming light. The buried light shielding structures may be lined with absorptive antireflective coating material to prevent light from being reflected off the surface of the buried light shielding structures.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 27, 2014
    Applicant: Aptina Imaging Corporation
    Inventors: Victor Lenchenkov, Xianmin Yi
  • Publication number: 20140077325
    Abstract: A photodiodes may be formed on a substrate such as an imager substrate. The photodiode may include first and second layers in the substrate that form a p-n junction. The first layer may have a first doping type such as p-type doping, whereas the second layer may have a second, opposite doping type such as n-type doping. A counter-doping implant region may be provided that only partially overlaps with the second layer of the photodiode. The counter-doping implant region may have an opposite doping type to the second layer and may have a dopant concentration that is less than the dopant concentration of the second layer. The counter-doping implant region may extend into a third layer of the substrate that may have the same doping type of the second layer but at a lower concentration than the counter-doping implant region.
    Type: Application
    Filed: September 19, 2013
    Publication date: March 20, 2014
    Applicant: Aptina Imaging Corporation
    Inventors: Xianmin Yi, Paul Perez
  • Patent number: 7995386
    Abstract: Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: August 9, 2011
    Assignee: Spansion LLC
    Inventors: Yuji Mizuguchi, Mark W. Randolph, Darlene Gay Hamilton, Yi He, Zhizheng Liu, Yanxia (Emma) Lin, Xianmin Yi, Gulzar Kathawala, Amol Ramesh Joshi, Kuo-Tung Chang, Edward Franklin Runnion, Sung-Chul Lee, Sung-Yong Chung, Yanxiang Liu, Yu Sun
  • Publication number: 20100128521
    Abstract: Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 27, 2010
    Applicant: SPANSION LLC
    Inventors: Yuji Mizuguchi, Mark W. Randolph, Darlene Gay Hamilton, Yi He, Zhizheng Liu, Yanxia (Emma) Lin, Xianmin Yi, Gulzar Kathawala, Amol Ramesh Joshi, Kuo-Tung Chang, Edward Franklin Runnion, Sung-Chul Lee, Sung-Yong Chung, Yanxiang Liu, Yu Sun
  • Patent number: 7391941
    Abstract: An arrayed waveguide grating with improved edge channel aberration may be achieved by tuning the arrayed waveguide grating to have a stigmatic point for the input and output waveguides that is not at the center of the Rowland circle. In this way, crosstalk, ripples, and transmission spectrum uniformity may be improved in some embodiments of the present invention.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 24, 2008
    Assignee: Intel Corporation
    Inventor: Xianmin Yi
  • Patent number: 7305162
    Abstract: An interference waveguide device made of a material with a positive derivative of refractive index over temperature may be combined with a compensating waveguide device. The compensating waveguide device may be made of a material with opposite and larger derivative of refractive index. The outputs of the compensating device may be selectively coupled to inputs of the interference device to provide an athermal interference waveguide device.
    Type: Grant
    Filed: May 30, 2002
    Date of Patent: December 4, 2007
    Assignee: Intel Corporation
    Inventors: Dmitri E. Nikonov, Xianmin Yi