Abstract: A method of fabricating a semiconductor device includes forming an interconnect structure over a front side of a sensor substrate, thinning the sensor substrate from a back side of the sensor substrate, etching trenches into the sensor substrate, pre-cleaning an exposed surface of the sensor substrate, epitaxially growing a charge layer directly on the pre-cleaned exposed surface of the sensor substrate, and forming isolation structures within the etched trenches.

Abstract: Embodiments of the invention provide improved apparatus for depositing layers on substrates, such as by chemical vapor deposition (CVD). The inventive apparatus disclosed herein may advantageously facilitate one or more of depositing films having reduced film thickness non-uniformity within a given process chamber, improved particle performance (e.g., reduced particles on films formed in the process chamber), chamber-to-chamber performance matching amongst a plurality of process chambers, and improved process chamber serviceability.

Abstract: A method of forming a doped semiconductor layer on a substrate is provided. A foundation layer having a crystal structure compatible with a thermodynamically favored crystal structure of the doped semiconductor layer is formed on the substrate and annealed, or surface annealed, to substantially crystallize the surface of the foundation layer. The doped semiconductor layer is formed on the foundation layer. Each layer may be formed by vapor deposition processes such as CVD. The foundation layer may be germanium and the doped semiconductor layer may be phosphorus doped germanium.

Abstract: A method of forming a doped semiconductor layer on a substrate is provided. A foundation layer having a crystal structure compatible with a thermodynamically favored crystal structure of the doped semiconductor layer is formed on the substrate and annealed, or surface annealed, to substantially crystallize the surface of the foundation layer. The doped semiconductor layer is formed on the foundation layer. Each layer may be formed by vapor deposition processes such as CVD. The foundation layer may be germanium and the doped semiconductor layer may be phosphorus doped germanium.

Abstract: A method of forming a doped semiconductor layer on a substrate is provided. A foundation layer having a crystal structure compatible with a thermodynamically favored crystal structure of the doped semiconductor layer is formed on the substrate and annealed, or surface annealed, to substantially crystallize the surface of the foundation layer. The doped semiconductor layer is formed on the foundation layer. Each layer may be formed by vapor deposition processes such as CVD. The foundation layer may be germanium and the doped semiconductor layer may be phosphorus doped germanium.

Abstract: A method of forming a doped semiconductor layer on a substrate is provided. A foundation layer having a crystal structure compatible with a thermodynamically favored crystal structure of the doped semiconductor layer is formed on the substrate and annealed, or surface annealed, to substantially crystallize the surface of the foundation layer. The doped semiconductor layer is formed on the foundation layer. Each layer may be formed by vapor deposition processes such as CVD. The foundation layer may be germanium and the doped semiconductor layer may be phosphorus doped germanium.

Abstract: Embodiments of the invention provide improved apparatus for depositing layers on substrates, such as by chemical vapor deposition (CVD). The inventive apparatus disclosed herein may advantageously facilitate one or more of depositing films having reduced film thickness non-uniformity within a given process chamber, improved particle performance (e.g., reduced particles on films formed in the process chamber), chamber-to-chamber performance matching amongst a plurality of process chambers, and improved process chamber serviceability.

Abstract: Method of forming a lightly phosphorous doped silicon film. A substrate is provided. A process gas comprising a phosphorous source gas and a disilane gas is used to form a lightly phosphorous doped silicon film on the substrate. The diluted phosphorous source gas has a phosphorous concentration of 1%. The phosphorous source gas and the disilane gas have a flow ratio less than 1:100. The lightly phosphorous doped silicon film has a phosphorous doping concentration less than 1×1020 atoms/cm3.

Abstract: Method of forming a lightly phosphorous doped silicon film. A substrate is provided. A process gas comprising a phosphorous source gas and a disilane gas is used to form a lightly phosphorous doped silicon film on the substrate. The diluted phosphorous source gas has a phosphorous concentration of 1%. The phosphorous source gas and the disilane gas have a flow ratio less than 1:100. The lightly phosphorous doped silicon film has a phosphorous doping concentration less than 1×1020 atoms/cm3.

Abstract: Method of forming a lightly phosphorous doped silicon film. A substrate is provided. A process gas comprising a phosphorous source gas and a disilane gas is used to form a lightly phosphorous doped silicon film on the substrate. The diluted phosphorous source gas has a phosphorous concentration of 1%. The phosphorous source gas and the disilane gas have a flow ratio less than 1:100. The lightly phosphorous doped silicon film has a phosphorous doping concentration less than 1×1020 atoms/cm3.

Abstract: A silicon germanium layer is deposited directly on a gate dielectric layer formed over a semiconductor material of a substrate. A mixture of germaine and disilane gases is preferably used to form the silicon germanium layer. Disilane, when used together with germaine, forms a uniform silicon germanium layer.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: Provided herein is an emissivity-change-free pumping plate kit used in a single wafer chamber. This kit comprises a top open pumping plate, and optionally a skirt and/or a second stage choking plate. The skirt may be installed around the wafer heater, underneath the wafer heater, or along the chamber body inside the chamber. The choking plate is installed downstream of the top open pumping plate along the purge gas flow. Also provided is a method of preventing emissivity change and further providing optimal film thickness uniformity during wafer processing by utilizing such kit in the chamber.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: A silicon nitride layer is formed over transistor gates while the processing temperature is relatively high, typically at least 500° C., and the pressure is relatively high, typically at least 50 Torr, to obtain a relatively high rate of formation of the silicon nitride layer. Processing conditions are controlled so as to more uniformly form the silicon nitride layer. Generally, the ratio of the NH3 gas to the silicon-containing gas by volume is selected sufficiently high so that, should the surface have a low region between transistor gates which is less than 0.15 microns wide and have a height-to-width ratio of at least 1.0, as well as an entirely flat area of at least 5 microns by 5 microns, the layer forms at a rate of not more than 25% faster on the flat area than on a base of the low region.

Abstract: A method for depositing doped polycrystalline or amorphous silicon film. The method includes placing a substrate onto a susceptor. The susceptor includes a body having a resistive heater therein and a thermocouple in physical contact with the resistive heater. The susceptor is located in the process chamber such that the process chamber has a top portion above the susceptor and a bottom portion below the susceptor. The method further includes heating the susceptor. The method further includes providing a process gas mix into the process chamber through a shower head located on the susceptor. The process gas mix includes a silicon source gas, a dopant gas, and a carrier gas. The carrier gas includes nitrogen. The method further includes forming the doped silicon film from the silicon source gas.

Abstract: The present invention provides a method of forming a ruthenium seed layer on a substrate comprising the steps of introducing a ruthenium-containing compound into a CVD apparatus; introducing oxygen into the CVD apparatus; maintaining an oxygen rich environment in the process chamber for the initial formation of a ruthenium oxide seed layer; vaporizing the ruthenium-containing compound; depositing the ruthenium oxide seed layer onto the substrate by chemical vapor deposition; and annealing the deposited ruthenium oxide seed layer in a gas ambient forming a ruthenium seed layer. Also provided is a method of depositing a ruthenium thin metal film using a metalorganic precursor onto a CVD ruthenium seed layer by metalorganic chemical vapor deposition.

Abstract: The present invention provides a method of forming a ruthenium seed layer on a substrate comprising the steps of introducing a ruthenium-containing compound into a CVD apparatus; introducing oxygen into the CVD apparatus; maintaining an oxygen rich environment in the process chamber for the initial formation of a ruthenium oxide seed layer; vaporizing the ruthenium-containing compound; depositing the ruthenium oxide seed layer onto the substrate by chemical vapor deposition; and annealing the deposited ruthenium oxide seed layer in a gas ambient forming a ruthenium seed layer. Also provided is a method of depositing a ruthenium thin metal film using a metalorganic precursor onto a CVD ruthenium seed layer by metalorganic chemical vapor deposition.

Abstract: Provided herein is an emissivity-change-free pumping plate kit used in a single wafer chamber. This kit comprises a top open pumping plate, and optionally a skirt and/or a second stage choking plate. The skirt may be installed around the wafer heater, underneath the wafer heater, or along the chamber body inside the chamber. The choking plate is installed downstream of the top open pumping plate along the purge gas flow. Also provided is a method of preventing emissivity change and further providing optimal film thickness uniformity during wafer processing by utilizing such kit in the chamber.