Abstract: Embodiments of a laminate leadless carrier package are presented. The package includes an optoelectronic chip, a substrate supporting the optoelectronic chip, a plurality of conductive slotted vias, a wire bond pad disposed on the top surface of the substrate, a wire bond coupled to the optoelectronic chip and the wire bond pad and an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate. The slotted vias provide electrical connections between the top conductive layer and the bottom conductive layer. The substrate includes a plurality of conductive and dielectric layers laminated together including a bottom conductive layer, a top conductive layer, and a dielectric layer between the top and bottom conductive layers. The encapsulation is a molding compound, and the molding compound is pulled back from at least one of the slotted vias.

Abstract: Embodiments of a laminate leadless carrier package are presented. The package includes an optoelectronic chip, a substrate supporting the optoelectronic chip, a plurality of conductive slotted vias, a wire bond pad disposed on the top surface of the substrate, a wire bond coupled to the optoelectronic chip and the wire bond pad and an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate. The slotted vias provide electrical connections between the top conductive layer and the bottom conductive layer. The substrate includes a plurality of conductive and dielectric layers laminated together including a bottom conductive layer, a top conductive layer, and a dielectric layer between the top and bottom conductive layers. The encapsulation is a molding compound, and the molding compound is pulled back from at least one of the slotted vias.

Abstract: A laminate leadless carrier package comprising an optoelectronic chip, a substrate supporting the chip, the substrate comprising a plurality of conductive and dielectric layers; a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate; an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound; and wherein the package is arranged to be mounted as a side-looker. A process for manufacturing laminate leadless carrier packages, comprising preparing a substrate; applying epoxy adhesive to a die attach pad; mounting an optoelectronic chip on the die attach pad; wire-bonding the optoelectronic chip; molding a molding compound to form an encapsulation covering the optoelectronic chip, a wire bond, and the top surface of the substrate; and dicing the substrate into individual packages.

Abstract: A laminate leadless carrier package comprising an optoelectronic chip, a substrate supporting the chip, the substrate comprising a plurality of conductive and dielectric layers; a wire bond coupled to the optoelectronic chip and a wire bond pad positioned on the top surface of the substrate; an encapsulation covering the optoelectronic chip, the wire bond, and at least a portion of the top surface of the substrate, wherein the encapsulation is a molding compound; and wherein the package is arranged to be mounted as a side-looker. A process for manufacturing laminate leadless carrier packages, comprising preparing a substrate; applying epoxy adhesive to a die attach pad; mounting an optoelectronic chip on the die attach pad; wire-bonding the optoelectronic chip; molding a molding compound to form an encapsulation covering the optoelectronic chip, a wire bond, and the top surface of the substrate; and dicing the substrate into individual packages.