Abstract: A method of accelerating a memory operation of an electronic device, performed by a processor, and a method of evaluating the method are disclosed. The method of accelerating the memory operation of the electronic device, performed by the processor, includes determining whether to offload the memory operation to a memory device based on a memory size corresponding to the memory operation, in response to detecting the memory operation, generating instructions corresponding to the memory operation in response to determining to offload the memory operation to the memory device, transmitting the instructions to the memory device, and receiving, from the memory device, an execution result corresponding to the memory operation performed based on the instructions.

Abstract: A method includes obtaining statistical information about page access by scanning a page table entry related to a page table, classifying a page in the page table entry as a hot page or a cold page based on the statistical information, generating a page list comprising the classified hot page or the classified cold page, and transmitting the page list to a host device, wherein the page list is used to adjust a least recently used (LRU) list.

Abstract: A non-uniform memory access (NUMA) architecture-based near-memory processing (NMP) emulator apparatus includes a host simulator module configured to perform a function of a host system using a non-uniform memory access (NUMA) node of a NUMA architecture, and one or more acceleration dual in-line memory module (AXDIMM) emulator modules, wherein each of the one or more AXDIMM emulator modules is configured to perform a function of a stream of an AXDIMM architecture using a NUMA node of the NUMA architecture.

Abstract: The present disclosure provides a square battery and a welding method. The square battery includes: a cover plate provided with a pole; and a core provided with a tab, where the tab is directly connected to the pole by laser welding, so that construction of an energy transmission path of the battery is realized, and a charging and discharging function of the core is realized. Additionally, since the tab of the core of the square battery is directly connected to the cover plate of the square battery, an auxiliary welding sheet and a connection sheet are removed, thereby improving the internal space utilization rate and the mass specific energy of the square battery.

Abstract: A non-uniform memory access (NUMA) architecture-based near-memory processing (NMP) emulator apparatus includes a host simulator module configured to perform a function of a host system using a non-uniform memory access (NUMA) node of a NUMA architecture, and one or more acceleration dual in-line memory module (AXDIMM) emulator modules, wherein each of the one or more AXDIMM emulator modules is configured to perform a function of a stream of an AXDIMM architecture using a NUMA node of the NUMA architecture.