Patents by Inventor Xiaoming Zhu
Xiaoming Zhu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250217041Abstract: A data management apparatus, a data management method, and a data storage device are provided. The data management apparatus includes a management unit and a data migration unit. The management unit manages data transmission channels between two types of storage media with different transmission performance. Then, the data migration unit migrates data between the two types of storage media through the managed data transmission channels. In this way, the data management apparatus can directly migrate data between storage media with different transmission performance, and a CPU in a system does not need to perform processing such as instruction conversion and protocol conversion, so that a delay of performing the foregoing processing by the CPU can be shortened. In addition, because the CPU does not need to perform data migration, resource overheads of the CPU can be reduced.Type: ApplicationFiled: March 20, 2025Publication date: July 3, 2025Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventor: Xiaoming Zhu
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Patent number: 12282659Abstract: A data management apparatus, a data management method, and a data storage device are provided. The data management apparatus includes a management unit and a data migration unit. The management unit manages data transmission channels between two types of storage media with different transmission performance. Then, the data migration unit migrates data between the two types of storage media through the managed data transmission channels. In this way, the data management apparatus can directly migrate data between storage media with different transmission performance, and a CPU in a system does not need to perform processing such as instruction conversion and protocol conversion, so that a delay of performing the foregoing processing by the CPU can be shortened. In addition, because the CPU does not need to perform data migration, resource overheads of the CPU can be reduced.Type: GrantFiled: October 4, 2022Date of Patent: April 22, 2025Assignee: Huawei Technologies Co., Ltd.Inventor: Xiaoming Zhu
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Publication number: 20250084929Abstract: Disclosed are a valve core with a microporous structure and a solenoid valve using the valve core. The solenoid valve comprises a valve body, an electromagnetic component, an elastic component and a valve core. The valve core comprises a sealing component and a microporous material. The valve core is arranged in the valve body, the elastic component is arranged between the valve core and the electromagnetic component, a flow channel is arranged on the valve body, the microporous material is matched with a flow channel on the valve body. In this design, the sealing component and the microporous material are integrated into a unified structure, forming a monolithic valve core. The control of flow rate and pressure is entirely dependent on the compression amount of the microporous material, revolutionizing the traditional flow control method of the solenoid valve. This approach enhances the precision of flow control within a certain range.Type: ApplicationFiled: November 22, 2024Publication date: March 13, 2025Applicant: SUZHOU RAYONTECH TECHNOLOGY CO., LTDInventors: Yong LUO, Renqin ZHANG, Hongmei CHEN, Xiaoming ZHU, Kai YANG, Qiaoqiao ZHU, Mengna RU
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Publication number: 20250044954Abstract: A storage apparatus includes a controller and a storage medium that are connected to each other. The controller is configured to send a data processing instruction to the storage medium. After executing the data processing instruction, the storage medium is configured to send a target identifier to the controller. The target identifier is at least one of a first identifier and a second identifier, the first identifier indicates the data processing instruction, and the second identifier indicates a fault status. The controller is further configured to confirm, based on the target identifier, that the storage medium has executed the data processing instruction.Type: ApplicationFiled: October 23, 2024Publication date: February 6, 2025Inventor: Xiaoming Zhu
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Patent number: 12152687Abstract: The present disclosure discloses a micro-flow valve control mechanism, which comprises an electromagnetic coil, a base, a ring seat, a moving plate and an elastic plate; wherein the elastic plate is positioned above the base, the ring seat and the moving plate are positioned between the base and the elastic plate, the moving plate is positioned at the inner side of the ring seat. In this scheme, the structure of valve air intake control is optimized, and the ring seat plays the guiding role in the lifting of the moving plate to a certain extent, which ensures that the moving plate will not deflect in the air intake process, so that the outer ring at the lower side of the moving plate can allow air to enter uniformly, thus ensuring the working stability of the electromagnetic valve.Type: GrantFiled: October 28, 2020Date of Patent: November 26, 2024Inventors: Yong Luo, Renqin Zhang, Hongmei Chen, Cheng-Te Lin, Chen Ye, Xiaoming Zhu
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Publication number: 20240340343Abstract: Example data processing methods and apparatus are described. The data processing system includes an application server and a storage device. After receiving a first management request, the storage device configures a processing mode of the storage device for a data access request. The application server sends a data access request to the storage device, where the data access request is a request to access data stored in the storage device. The storage device processes, based on the processing mode, the data access request sent by the application server, and accesses the stored data.Type: ApplicationFiled: June 18, 2024Publication date: October 10, 2024Inventors: Xiaoming ZHU, Jea Woong HYUN
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Publication number: 20240338318Abstract: This application discloses a cache management method, apparatus, and system, and a storage medium, and belongs to the computer field. The system includes a processor and a memory controller. The processor and the memory controller are connected through a first channel and a second channel, the first channel is used to perform a memory read/write operation, and the second channel is used to transmit event information corresponding to the memory read/write operation. The processor is configured to send event information of a first event to the memory controller through the second channel. The memory controller is configured to manage a cache storage based on the event information, and the cache storage is configured to cache a part of data that is in the memory storage. This application can improve utilization of the cache storage.Type: ApplicationFiled: June 20, 2024Publication date: October 10, 2024Inventors: Yigang ZHOU, Xiaoming ZHU
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Publication number: 20240330109Abstract: A plurality of memory chips included in the storage class memory are divided into at least one group. Each group includes a first-type memory chip and a second-type memory chip. The second-type memory chip is configured to store running error correction code, and the first-type memory chip is configured to store data and retry error correction code. The running error correction code is for performing first-level memory error correction on the data stored in the first-type memory chip in the same group. The retry error correction code is for performing, when the first-level memory error correction fails, second-level memory error correction on the data stored in the first-type memory chip.Type: ApplicationFiled: June 11, 2024Publication date: October 3, 2024Inventor: Xiaoming Zhu
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Patent number: 12105587Abstract: A method including determining that a memory unit is available for a channel for communication between a storage controller and a non-volatile storage device, the memory unit being for temporary storage for encoded data for transmission through the channel; allocating the memory unit to that channel; and updating a memory mapping entry corresponding to the memory unit. The memory mapping entry is stored in the storage controller. Updating a memory mapping entry may be based on reading/write tasks. The memory mapping entry may indicate a cross channel status, an operation mode and an identifier of the channel. The method may include determining the channel being stuck due to memory shortage and mapping more memory units to the channel.Type: GrantFiled: June 30, 2023Date of Patent: October 1, 2024Assignee: InnoGrit Technologies Co., Ltd.Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Publication number: 20240320168Abstract: A storage medium includes at least two medium dies, the at least two medium dies are sequentially connected via signal lines to form a closed loop, and the at least two medium dies are for data transmission through a bus. Levels of signal lines are each controlled by two medium dies connected via the corresponding signal line, and are used by the at least two medium dies to determine a sequence of performing data transmission through the bus. The storage medium provided in this application can determine, based on the level of the signal line, the sequence of performing data transmission through the bus.Type: ApplicationFiled: June 6, 2024Publication date: September 26, 2024Inventor: Xiaoming ZHU
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Publication number: 20240295275Abstract: The present disclosure discloses a micro-flow valve control mechanism, which comprises an electromagnetic coil, a base, a ring seat, a moving plate and an elastic plate; wherein the elastic plate is positioned above the base, the ring seat and the moving plate are positioned between the base and the clastic plate, the moving plate is positioned at the inner side of the ring seat. In this scheme, the structure of valve air intake control is optimized, and the ring seat plays the guiding role in the lifting of the moving plate to a certain extent, which ensures that the moving plate will not deflect in the air intake process, so that the outer ring at the lower side of the moving plate can allow air to enter uniformly, thus ensuring the working stability of the electromagnetic valve.Type: ApplicationFiled: October 28, 2020Publication date: September 5, 2024Inventors: Yong LUO, Renqin ZHANG, Hongmei CHEN, Cheng-Te LIN, Chen YE, Xiaoming ZHU
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Patent number: 12032441Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.Type: GrantFiled: June 30, 2023Date of Patent: July 9, 2024Assignee: InnoGrit Technologies Co., Ltd.Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Publication number: 20240028263Abstract: A storage apparatus includes a controller and a storage medium. The storage medium includes a command decoder and a plurality of storage units. The controller is connected to the command decoder of the storage medium. The controller is configured to send a first processing command to the command decoder of the storage medium, where the first processing command includes first information and second information, the first information indicates a processing manner, and the second information indicates a data length of data to be processed.Type: ApplicationFiled: October 3, 2023Publication date: January 25, 2024Inventors: Xiaoming Zhu, Yifeng Chen, Yu Liao
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Publication number: 20230409198Abstract: In a computer device, a memory sharing control device is deployed between a processor and a memory pool, and the processor accesses the memory pool via the memory sharing control device. Different processing units, such as processors or cores in processors, access one memory in the memory pool in different time periods, so that the memory is shared by a plurality of processing units, and utilization of memory resources is improved.Type: ApplicationFiled: September 4, 2023Publication date: December 21, 2023Applicant: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Yigang Zhou, Xiaoming Zhu, Guanfeng Zhou
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Publication number: 20230342312Abstract: Embodiments of this application disclose a storage device and a computer device, and belong to the field of computer technologies. The storage device includes a first PCM, a main memory, and a controller. The first PCM and the controller are packaged in a same chip. A latency of the first PCM is less than that of the main memory, and storage density of the main memory is greater than that of the first PCM. The controller is configured to store data in the first PCM and the main memory based on a read/write temperature of the data, where the first PCM is a cache of the main memory. According to embodiments of this application, a cache capacity of the storage device can be increased, and device costs can be reduced.Type: ApplicationFiled: June 27, 2023Publication date: October 26, 2023Inventors: Xiaoming ZHU, Weiliang JING
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Publication number: 20230342248Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.Type: ApplicationFiled: June 30, 2023Publication date: October 26, 2023Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Publication number: 20230342247Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.Type: ApplicationFiled: June 30, 2023Publication date: October 26, 2023Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Patent number: 11734109Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.Type: GrantFiled: December 20, 2021Date of Patent: August 22, 2023Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Patent number: 11726872Abstract: Systems, apparatus and methods are provided for providing an error correction code (ECC) architecture with flexible memory mapping. An apparatus may include an error correction code (ECC) engine, a multi-channel interface for one or more non-volatile storage devices, a memory including a plurality of memory units, a storage containing a plurality of mapping entries to indicate allocation status of the plurality of memory units and a memory mapping manager. The plurality of memory units may be coupled to the ECC engine and the multi-channel interface. The memory mapping manager may be configured to control allocation of the plurality of memory units and set allocation status in the plurality of mapping entries.Type: GrantFiled: December 20, 2021Date of Patent: August 15, 2023Assignee: INNOGRIT TECHNOLOGIES CO., LTD.Inventors: Xiaoming Zhu, Jie Chen, Bo Fu, Zining Wu
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Publication number: 20230228602Abstract: Flow meters are disclosed that provide improved measurements of fluid flowing through fan coils. A flow meter includes a body that defines an inlet, an outlet, and a flow path extending along a longitudinal axis between the inlet and the outlet. The flow meter also includes transducers coupled to the body and exposed to the flow path defined by the body. The transducers are configured to transmit and receive a signal travelling through the flow path to measure a flow rate of fluid of the fan coil. The flow meter also includes one or more reflectors coupled to the body and exposed to the flow path defined by the body. Each of the one or more reflectors has a flat reflective surface that is exposed to the flow path and is configured to reflect the signal to relay the signal between the transducers.Type: ApplicationFiled: January 19, 2022Publication date: July 20, 2023Inventors: Xiaoming ZHU, Roger Lee BOYDSTUN, Travis Wayne MARTIN, James Wallace BROWN