Abstract: The disclosure is related to a circuitry system and a method for processing interrupt priority. The circuitry system is such as a system-on-chip that operates the method. The high-priority interrupt is configured to be always on and prohibited from accessing a critical section. When a high-priority interrupt occurs as a processor of the system is in operation, the processor sets a low-priority interrupt to access the critical section where the high-priority interrupt accessed previously. When the low-priority interrupt is terminated, the processor determines whether or not to wake up the unfinished task that is previously set for the high-priority interrupt. The processor continues processing the task since the task has not been finished. The circuity system can therefore retain the characteristics of all disabled interrupts and also maintain an instantaneity for the important tasks of the system.

Abstract: An electronic apparatus includes a flash memory, a memory protection unit, a random access memory, and a central processing unit. The flash memory is configured to store at least one first application program/datum. The memory protection unit is configured to store a plurality of address region data. The random access memory has at least one memory bank. The central processing unit is configured to execute/access the first application program/datum in the flash memory through the random access memory according to at least one address datum. If the address datum matches one of the address region data, the memory protection unit generates an error signal to the central processing unit. The central processing unit loads the first application program/datum stored in the flash memory into the memory bank of the random access memory according to a positioning condition of a matched address region datum.