Patents by Inventor Xiao Zhong

Xiao Zhong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9128765
    Abstract: A method of sharing virtual machine resources. The method includes: in response to at least one user logging in to the virtual machine, monitoring file operations taken by the user in the virtual machine; recording the types of file operations; in response to the user logging out from the virtual machine, restoring the virtual machine back to the original state at the time when the user logged in to the virtual machine according to the recorded types of file operations; and in response to receiving a request for virtual machine resources, assigning one of the virtual machines which is idle and restored back to the original state to the requesting user.
    Type: Grant
    Filed: April 26, 2012
    Date of Patent: September 8, 2015
    Assignee: International Business Machines Corporation
    Inventors: Li Rong Jian, Jie Qiu, Jie Yang, Tao Yu, Xiao Zhong
  • Publication number: 20150214293
    Abstract: A capacitor structure includes a substrate with a plurality of dielectric layers sequentially formed thereon, a trench formed in the dielectric layers, wherein the trench is composed of at least two interconnected dual damascene recesses, each dual damascene recess formed in one dielectric layer; and a capacitor multilayer disposed on the sidewall of the trench.
    Type: Application
    Filed: January 27, 2014
    Publication date: July 30, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Duan Quan Liao, Yikun Chen, CHING HWA TEY, Xiao Zhong Zhu
  • Publication number: 20150000435
    Abstract: A power-assisted supporting apparatus includes a base, a supporting member, and a drive mechanism connected between the base and the supporting member. The drive mechanism includes a motor, a gear assembly, and a controller controlling the motor. The motor includes a drive gear driving the gear assembly. The gear assembly includes a connecting shaft connected to the supporting member. The user presses buttons to instruct the controller to activate the motor, and the drive gear drives the gear assembly to rotate an electronic device which is held by the supporting member.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 1, 2015
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WUHAN) CO., LTD.
    Inventors: GUANG-LEI ZHANG, XIAO-ZHONG JING, YI-TING HSIEH, GUANG-YAO LEE
  • Publication number: 20150000436
    Abstract: An electronic device includes a base, a display unit, a supporting member, a first drive mechanism, a second drive mechanism, and a controller. The first drive mechanism includes a first motor and a first gear assembly. The first motor includes a first drive gear driving the first gear assembly and the second drive mechanism includes a second motor and a second gear assembly. The second motor includes a second drive gear driving the second gear assembly. By operating buttons, the user can change the orientation of the display unit or other supported device, the first and second motors providing power assistance to the user in two planes of movement.
    Type: Application
    Filed: July 19, 2013
    Publication date: January 1, 2015
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WUHAN) CO., LTD.
    Inventors: GUANG-LEI ZHANG, XIAO-ZHONG JING, YI-TING HSIEH, GUANG-YAO LEE
  • Publication number: 20140362497
    Abstract: A power supply assembly includes a bracket defining an opening, a plurality of power supply units detachably installed in the bracket through the opening, and a plurality of shunt-wound connectors mounted in the bracket opposite to the opening. Each power supply unit includes a plug. The plugs of the power supply units are detachably and electrically coupled to the connectors.
    Type: Application
    Filed: June 26, 2013
    Publication date: December 11, 2014
    Applicants: HON HAI PRECISION INDUSTRY CO., LTD., HONG FU JIN PRECISION INDUSTRY (WUHAN) CO., LTD.
    Inventors: GUANG-LEI ZHANG, FA-YANG LI, XIAO-ZHONG JING, YI-TING HSIEH, GUANG-YAO LEE
  • Patent number: 8893134
    Abstract: A method for identifying a consumer-producer pattern in a multi-threaded application includes obtaining synchronization event data of the multi-threaded application, and identifying the consumer-producer communication pattern from the synchronization event data.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Peter F. Sweeney, Qiming Teng, Haichuan Wang, Xiao Zhong
  • Publication number: 20140252482
    Abstract: A FINFET transistor structure includes a substrate including a fin structure. Two combined recesses embedded within the substrate, wherein each of the combined recesses includes a first recess extending in a vertical direction and a second recess extending in a lateral direction, the second recess has a protruding side extending to and under the fin structure. Two filling layers respectively fill in the combined recesses. A gate structure crosses the fin structure.
    Type: Application
    Filed: May 27, 2014
    Publication date: September 11, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Rai-Min Huang, Sheng-Huei Dai, Chen-Hua Tsai, Duan Quan Liao, Yikun Chen, Xiao Zhong Zhu
  • Patent number: 8828878
    Abstract: A manufacturing method for a dual damascene structure first includes providing a substrate having at least a dielectric layer, a first hard mask layer, a first cap layer, a second hard mask layer, and a second cap layer sequentially formed thereon, performing a first double patterning process to form a plurality of first trench openings and second trench openings in the second cap layer and the second hard mask, and the first layer being exposed in bottoms of the first trench openings and the second trench openings, performing a second double patterning process to form a plurality of first via openings and second via openings in the first cap layer and the first hard mask layer, and transferring the first trench openings, the second trench openings, the first via openings, and the second via openings to the dielectric layer to form a plurality of dual damascene openings.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: September 9, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Duan Quan Liao, Yikun Chen, Xiao Zhong Zhu, Ching-Hwa Tey, Chen-Hua Tsai, Yu-Tsung Lai
  • Publication number: 20140225197
    Abstract: A FINFET transistor structure includes a substrate, a fin structure, an insulating layer and a gate structure. The fin structure is disposed on the substrate and directly connected to the substrate. Besides, the fin structure includes a fin conductive layer and a bottle neck. The insulating layer covers the substrate and has a protruding side which is formed by partially surrounding the bottle neck of the fin structure, and a bottom side in direct contact with the substrate so that the protruding side extend to and under the fin structure. The gate structure partially surrounds the fin structure.
    Type: Application
    Filed: April 25, 2014
    Publication date: August 14, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Rai-Min Huang, Sheng-Huei Dai, Chen-Hua Tsai, Duan Quan Liao, Yikun Chen, Xiao Zhong Zhu
  • Patent number: 8772860
    Abstract: A FINFET transistor structure includes a substrate, a fin structure, an insulating layer and a gate structure. The fin structure is disposed on the substrate and directly connected to the substrate. Besides, the fin structure includes a fin conductive layer and a bottle neck. The insulating layer covers the substrate and has a protruding side which is formed by partially surrounding the bottle neck of the fin structure, and a bottom side in direct contact with the substrate so that the protruding side extend to and under the fin structure. The gate structure partially surrounds the fin structure.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: July 8, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Rai-Min Huang, Sheng-Huei Dai, Chen-Hua Tsai, Duan Quan Liao, Yikun Chen, Xiao Zhong Zhu
  • Publication number: 20140141167
    Abstract: Polymer Pen Lithography materials that retain the simplicity characteristic for the fabrication of poly(dimethyl siloxane) tip arrays while preserving the control over feature dimensions and to understand the role of the mechanical properties of the different materials on Polymer Pen Lithography printing.
    Type: Application
    Filed: November 19, 2013
    Publication date: May 22, 2014
    Applicant: New York University
    Inventors: Adam B. Braunschweig, Xiao Zhong, Kevin B. Schesing, Shudan Bian
  • Publication number: 20140068048
    Abstract: A method and apparatus for managing remote devices. In one embodiment of the present invention, there is provided a method of managing a remote device, comprising: obtaining a first identifier based on a name sequence in state information of the remote device, the first identifier being for indicating a template that provides the state information; obtaining a second identifier based on a numerical value sequence in the state information; sending a state access notification that comprises at least the first identifier and the second identifier; and providing the state information based on the first identifier and the second identifier in response to having received a result of activating the state access notification. In one embodiment of the present invention, there is provided an apparatus for managing a remote device.
    Type: Application
    Filed: August 30, 2013
    Publication date: March 6, 2014
    Applicant: International Business Machines Corporation
    Inventors: Andreas Kind, Peini Liu, Tian Cheng Liu, Ke Wei Sun, Lin Yang, Tao Yu, Zhang Yu, Yue Zhang, Xiao Zhong
  • Patent number: 8666177
    Abstract: The invention is related to encoding an image block of an image using a partitioned block transform. The inventors recognized that applying a texture-pattern associated invertible mapping to the pixels of a first partition, said first partition resulting from partitioning said image block according to a current texture pattern with which said texture-pattern associated invertible mapping is associated, allows for limiting the maximum number of required first 1-D transforms to not exceeding a number of columns in the image block as well as limiting the maximum number of required second 1-D transforms to not exceeding a number of rows in the image block, also. Achieving limitation of maximum required 1-D transforms enables more efficient implementation on hardware and improves encoding performance but also allows for further partitions according to texture patterns which comprise at least one of multiple strips, texture patterns with highly unsymmetrical pixel distribution and non-directional texture patterns.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: March 4, 2014
    Assignee: Thomson Licensing
    Inventors: Zhi Bo Chen, Xiao Zhong Xu, Qu Qing Chen
  • Patent number: 8612389
    Abstract: A method and apparatus for discovering application configuration files in a system. The method includes the steps of: obtaining a process identifier of an application in concern; comparing the obtained process identifier with a process identifier of a process for operating configuration files in the system; and determining configuration files to be the configuration files of the application in concern if the obtained process identifier is identical to the process identifier of a process for operating the configuration files in the system. Application configuration files can be automatically discovered and thereby monitored, such that the change of the application configuration files can be effectively and accurately detected, so as to facilitate a user to perform various subsequent operations.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: December 17, 2013
    Assignee: International Business Machines Corporation
    Inventors: Tian Cheng Liu, Qiming Teng, Jie Qiu, Xiao Zhong
  • Patent number: 8527944
    Abstract: A method and apparatus for a native method call. The method comprises: generating, in response to a native method call-associated event, a template copy from a generic template for processing the native method call; filling information required for processing the native method call in corresponding locations in the template copy; and changing a code execution flow to execute the template copy. When a native method is called, the native method is processed by dynamically inserting the template copy in the execution path at the assembly level.
    Type: Grant
    Filed: January 19, 2010
    Date of Patent: September 3, 2013
    Assignee: International Business Machines Corporation
    Inventors: Qiming Teng, Feng Wang, Haichuan Wang, Xiao Zhong
  • Patent number: 8521472
    Abstract: A requesting critical wait time of a given resource may be determined. The requesting critical wait time is the time spent by the one or more resources waiting for the given resource, wherein at least one of the resources waiting for the given resource can proceed if access to the given resource is granted. A requested by critical wait time for a resource is determined, the requested by critical wait time being time spent by the resource for waiting solely for the given resource, wherein if the resource were granted access to the given resource, the resource can proceed without further waiting.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: August 27, 2013
    Assignee: International Business Machines Corporation
    Inventors: Evelyn Duesterwald, Peter K. Malkin, Peter F. Sweeney, Qiming Teng, Haichuan Wang, Xiao Zhong
  • Patent number: 8507338
    Abstract: A fabricating method of semiconductor structure is provided. First, a substrate with a dielectric layer formed thereon is provided. The dielectric layer has a first opening and a second opening exposing a portion of the substrate. Further, a gate dielectric layer including a high-k dielectric layer and a barrier layer stacked thereon had been formed on the bottoms of the first opening and the second opening. Next, a sacrificial layer is formed on the portion of the gate dielectric layer within the second opening. Next, a first work function metal layer is formed to cover the portion of the gate dielectric layer within the first opening and the sacrificial layer. Then, the portion of the first work function metal layer and the sacrificial layer within the second opening are removed.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: August 13, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Duan-Quan Liao, Yi-Kun Chen, Xiao-Zhong Zhu
  • Publication number: 20130181264
    Abstract: A semiconductor structure includes at least a fin-shaped structure, a gate, a source/drain region, an interdielectric layer and an epitaxial structure. At least a fin-shaped structure is located on a bottom substrate. The gate covers the fin-shaped structure. The source/drain region is located in the fin-shaped structure next to the gate. The interdielectric layer covers the gate and the fin-shaped structure, wherein the interdielectric layer has a plurality of contact holes, respectively exposing at least a part of the source/drain region. The epitaxial structure is located in each of the contact holes, directly contacts and is only located on the source/drain region. Additionally, a semiconductor process formed said semiconductor structure is also provided.
    Type: Application
    Filed: January 17, 2012
    Publication date: July 18, 2013
    Inventors: Duan Quan Liao, Yikun Chen, Ching-Hwa Tey, Xiao Zhong Zhu
  • Patent number: 8490098
    Abstract: A method and an apparatus for concomitance scheduling a work thread and assistant threads associated with the work thread in a multi-threading processor system. The method includes: searching one or more assistant threads associated with the running of the work thread when preparing to run/schedule the work thread; running the one or more assistant threads that are searched; and running the work thread after all of the one or more assistant threads associated with the running of the work thread have run.
    Type: Grant
    Filed: January 6, 2009
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ying Chen, Yi Ge, Rui Hou, Liang Liu, Xiao Zhong
  • Patent number: 8433948
    Abstract: A method, apparatus, and computer program product for realizing application high availability are provided. The application is installed on both a first node and a second node, the first node being used as an active node, and the second node being used as a passive node. The method includes: monitoring access operations to files by an application during its execution on the active node; replicating the monitored updates to the file by the application from the active node to a storage device accessible to the passive node if the application performs updates to a file during the access operations; sniffing the execution of the application on the active node; and switching the active node to the second node and initiating the application on the second node in response to sniffing a failure in the execution of the application on the active node.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: April 30, 2013
    Assignee: International Business Machines Corporation
    Inventors: Ying Li, Jie Qiu, Jie Yang, Xiao Zhong