Patents by Inventor Xiaochang Miao
Xiaochang Miao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10157680Abstract: Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memory cell transistors in the middle of the NAND string are programmed and program verified prior to programming and verifying other memory cell transistors towards the drain-side end of the NAND string and/or the source-side end of the NAND string. In one example, for a NAND string with 32 memory cell transistors corresponding with word lines WL0 through WL31 from the source-side end of the NAND string to the drain-side end of the NAND string, the memory cell transistor corresponding with word line WL16 may be programmed and program verified prior to programming the memory cell transistors corresponding with word lines WL15 and WL17.Type: GrantFiled: December 20, 2016Date of Patent: December 18, 2018Assignee: SANDISK TECHNOLOGIES LLPInventors: Xiang Yang, Huai-Yuan Tseng, Xiaochang Miao, Deepanshu Dutta
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Patent number: 9865352Abstract: Apparatuses, systems, methods, and computer program products are disclosed for program sequencing. An apparatus includes a block of non-volatile storage cells having a plurality of word lines. The word lines are organized into a monotonically increasing sequence. The apparatus includes a controller for the block. The controller is configured to program a set of storage cells of a word line to one or more storage states above a predetermined threshold and to program a set of storage cells of a previous word line adjacent to and before the word line in the sequence, to one or more storage states below the predetermined threshold after programming the set or storage cells of the word line to the one or more storage states above the predetermined threshold.Type: GrantFiled: March 4, 2016Date of Patent: January 9, 2018Assignee: SANDISK TECHNOLOGIES, LLCInventors: Xiaochang Miao, Ken Oowada, Genki Sano, Deepanshu Dutta
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Patent number: 9842657Abstract: Multi-state programming of non-volatile memory cells, where cells being programmed to different target states are programmed concurrently, is performed by modulating the program speed of each state using a controlled amount of state-dependent weak boosting in their respective channels. In one example, the channel boosting is controlled by using a multi-stair word line ramp in conjunction with raising of the voltage on bit lines at a time based on the corresponding memory cell's target state.Type: GrantFiled: May 18, 2017Date of Patent: December 12, 2017Assignee: SanDisk Technologies LLCInventors: Deepanshu Dutta, Xiaochang Miao, Muhammad Masuduzzaman
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Publication number: 20170178736Abstract: Systems and methods for reducing residual electrons within a NAND string subsequent to performing a sensing operation using the NAND string or during the sensing operation. A middle-out programming sequence may be performed in which memory cell transistors in the middle of the NAND string are programmed and program verified prior to programming and verifying other memory cell transistors towards the drain-side end of the NAND string and/or the source-side end of the NAND string. In one example, for a NAND string with 32 memory cell transistors corresponding with word lines WL0 through WL31 from the source-side end of the NAND string to the drain-side end of the NAND string, the memory cell transistor corresponding with word line WL16 may be programmed and program verified prior to programming the memory cell transistors corresponding with word lines WL15 and WL17.Type: ApplicationFiled: December 20, 2016Publication date: June 22, 2017Applicant: SANDISK TECHNOLOGIES LLCInventors: Xiang Yang, Huai-Yuan Tseng, Xiaochang Miao, Deepanshu Dutta
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Publication number: 20170125101Abstract: Apparatuses, systems, methods, and computer program products are disclosed for program sequencing. An apparatus includes a block of non-volatile storage cells having a plurality of word lines. The word lines are organized into a monotonically increasing sequence. The apparatus includes a controller for the block. The controller is configured to program a set of storage cells of a word line to one or more storage states above a predetermined threshold and to program a set of storage cells of a previous word line adjacent to and before the word line in the sequence, to one or more storage states below the predetermined threshold after programming the set or storage cells of the word line to the one or more storage states above the predetermined threshold.Type: ApplicationFiled: March 4, 2016Publication date: May 4, 2017Applicant: SanDisk Technologies, Inc.Inventors: Xiaochang Miao, Ken Oowada, Genki Sano, Deepanshu Dutta
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Patent number: 9443606Abstract: A non-volatile storage system includes a plurality of non-volatile storage elements, a plurality of bit lines connected to the non-volatile storage elements, a plurality of word lines connected to the non-volatile storage elements, and one or more control circuits connected to the bit lines and word lines. The one or more control circuits perform programming, verifying, reading and erasing for the non-volatile storage elements. When verifying, a first subset of bit lines connected to non-volatile storage elements are charged to allow for sensing, while a second subset of bit lines are not charged. When reading, a two strobe sensing process is selectively used to more accurately read data from the non-volatile storage elements.Type: GrantFiled: October 28, 2014Date of Patent: September 13, 2016Assignee: SANDISK TECHNOLOGIES LLCInventors: Deepanshu Dutta, Xiaochang Miao, Gerrit Jan Hemink
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Publication number: 20160118135Abstract: A non-volatile storage system includes a plurality of non-volatile storage elements, a plurality of bit lines connected to the non-volatile storage elements, a plurality of word lines connected to the non-volatile storage elements, and one or more control circuits connected to the bit lines and word lines. The one or more control circuits perform programming, verifying, reading and erasing for the non-volatile storage elements. When verifying, a first subset of bit lines connected to non-volatile storage elements are charged to allow for sensing, while a second subset of bit lines are not charged. When reading, a two strobe sensing process is selectively used to more accurately read data from the non-volatile storage elements.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Applicant: SANDISK TECHNOLOGIES INC.Inventors: Deepanshu Dutta, Xiaochang Miao, Gerrit Jan Hemink
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Publication number: 20160118134Abstract: A non-volatile storage system includes a plurality of non-volatile storage elements, a plurality of bit lines connected to the non-volatile storage elements, a plurality of word lines connected to the non-volatile storage elements, and one or more control circuits connected to the bit lines and word lines. The one or more control circuits perform programming, verifying, reading and erasing for the non-volatile storage elements. When verifying, a first subset of bit lines connected to non-volatile storage elements are charged to allow for sensing, while a second subset of bit lines are not charged. When reading, a two strobe sensing process is selectively used to more accurately read data from the non-volatile storage elements.Type: ApplicationFiled: October 28, 2014Publication date: April 28, 2016Applicant: SANDISK TECHNOLOGIES INC.Inventors: Deepanshu Dutta, Xiaochang Miao, Gerrit Jan Hemink