Abstract: A display substrate includes a display area and a bonding area located on one side of the display area; the display substrate includes a base substrate and a circuit structure layer disposed on the base substrate; the circuit structure layer of the display area is provided with a pixel driving circuit including multiple transistors, the display area further includes a light emitting structure layer and a package structure layer sequentially stacked on a side of the circuit structure layer away from the base substrate, the light emitting structure layer includes a light emitting device connected to the pixel driving circuit; a pad is provided in the circuit structure layer of the bonding area and configured to be bonded and connected to an external circuit board, a surface of the pad is disposed flush with a surface of the circuit structure layer around the pad and away from the base substrate.

Abstract: A display panel includes: a first base substrate; a plurality of scanning lines, which are located on one side of the first base substrate, extend in a first direction and are arranged in a second direction, wherein the first direction intersects with the second direction; a plurality of data lines, which are located on the same side of the first base substrate as the scanning lines, extend in the second direction and are arranged in the first direction; and a plurality of sub-pixels, which are respectively located in regions divided by the plurality of scanning lines and the plurality of data lines, wherein the plurality of sub-pixels constitute a plurality of pixel islands, the plurality of pixel islands are dived into a plurality of control regions, each control region comprises at least one pixel island, and each control region is independently driven to emit light.

Abstract: Provided is a display panel, including a driver backplane, a plurality of light-emitting devices, a black matrix, and a color filter layer. The black matrix is provided with a plurality of first light-passing holes in one-to-one correspondence with the plurality of light-emitting devices; and the color filter layer includes a plurality of color filter blocks in one-to-one correspondence with the plurality of first light-passing holes, and an auxiliary color filter layer structure disposed between any adjacent color filter blocks; wherein an orthographic projection of each first light-passing hole onto the driver backplane falls within an orthographic projection of the color filter corresponding to the first light-passing hole onto the driver backplane, and an orthographic projection of the auxiliary color filter layer structure onto the driver backplane at least partially overlaps orthographic projections of the black matrix onto the driver backplane.

Abstract: A display substrate, comprising: a first electrode layer, which is located on one side of a drive backplane and which comprises a plurality of first electrodes that are distributed in an array; a leakage cutoff layer, which is located on the side of the first electrode layer facing away from the drive backplane and is located between two adjacent first electrodes, the surface of the leakage cutoff layer on the side facing away from the drive backplane having a cutoff recess and cutoff protrusions located on both sides of the cutoff recess; a light-emitting functional layer, which is located on the side of the leakage cutoff layer and the first electrode layer facing away from the drive backplane; and a second electrode layer, which is located on the side of the light-emitting functional layer facing away from the drive backplane.

Abstract: An embodiment of the present disclosure provides a display substrate comprising a substrate comprising a display area and a peripheral area; a plurality of sub-pixels spaced apart by a pixel defining layer on the substrate and located in the display area, wherein the sub-pixels comprise: a first electrode; a first light-emitting layer; and a charge generating layer, wherein the pixel defining layer has a first opening exposing the first electrode, wherein an edge portion of the pixel defining layer adjacent to the first opening covers an edge portion of the first electrode, wherein the charge generating layer has a second opening, and an orthographic projection of the second opening on the substrate at least partially overlaps with an orthographic projection of the pixel defining layer on the substrate, wherein the charge generating layer has an edge portion adjacent to the second opening.

Abstract: An array base plate, wherein the array base plate comprises a substrate and a plurality of sub-pixels that are located on the substrate and arranged in array, and each of the sub-pixels comprises a pixel driving circuit and a light emitting device that are electrically connected. The pixel driving circuit comprises a drive module and a first control module, wherein the drive module is electrically connected to a first node, a second node and an anode of the light emitting device, wherein the drive module is configured for conducting a path between the second node and the anode under control of a voltage of the first node, and generating a current in the path to make the light emitting device emit light. The first control module is electrically connected to a first control signal line, a second power signal line and the anode of the light emitting device.

Abstract: The present application relates to an array substrate, which comprises: a driving backplane, in which a plurality of pixel circuits are formed, wherein capacitors of the plurality of pixel circuits comprise first capacitors and a second capacitor, a first electrode plate of each first capacitor has a first side edge, a first electrode plate of the second capacitor has a second side edge, the first side edge is opposite the second side edge, and a first included angle is formed between a straight line where the first side edge is located and a straight line where the second side edge is located, which is an acute angle.

Abstract: Provided is a display panel, including a driver backplane, a plurality of light-emitting devices, a black matrix, and a color resistance layer. The black matrix is provided with a plurality of first light-passing holes in one-to-one correspondence with the plurality of light-emitting devices; and the color resistance layer includes a plurality of color resistance blocks in one-to-one correspondence with the plurality of first light-passing holes, and an auxiliary color resistance structure disposed between any adjacent color resistance blocks; wherein an orthographic projection of each first light-passing hole onto the driver backplane falls within an orthographic projection of the color resistance block corresponding to the first light-passing hole onto the driver backplane, and an orthographic projection of the auxiliary color resistance structure onto the driver backplane is at least partially overlapped with orthographic projections of the black matrix onto the driver backplane.

Abstract: Provided is a gate drive circuit, including a plurality of shift registers and buffers in cascade, wherein each of the shift registers is configured to output a first gate scanning signal stage by stage according to a preset scanning timing; and each of the buffers is configured to perform waveform inversion on the first gate scanning signal for a plurality of times to convert the first gate scanning signal into a second gate scanning signal, wherein falling edge time of the second gate scanning signal is less than falling edge time of the first gate scanning signal.

Abstract: Provided are a silicon-based organic electroluminescent display substrate, a manufacturing method thereof, and a display panel. The display substrate includes: a silicon-based substrate and pixel units thereon. Each of the pixel units includes: a first electrode on a side of the silicon-based substrate; a light emitting layer on a side of the first electrode away from the silicon-based substrate; and a second electrode on a side of the light emitting layer away from the first electrode. The second electrode of each of the pixel units includes at least one composite structure including: a first metal film layer on a side of the light emitting layer away from the first electrode; a conductive scattering sub-structure on a side of the first metal film layer away from the light emitting layer; and a second metal film layer on a side of the conductive scattering sub-structure away from the first metal film layer.

Abstract: Provided is a display substrate, including: a base substrate; a plurality of conductive patterns on base substrate; a plurality of light-emitting elements on base substrate, where the plurality of light-emitting elements are arranged in array and spaced apart from each other, and at least one light-emitting element includes a first electrode, a first type semiconductor layer, a light-emitting layer, a second type semiconductor layer, and a second electrode, first electrode is electrically connected to conductive pattern, first type semiconductor layer is located on a side of first electrode, light-emitting layer is located on a side of first type semiconductor layer, second type semiconductor layer is located on a side of light-emitting layer, and second electrode is located on a side of second type semiconductor layer; and a conductive light-shielding portion on base substrate, located in a gap between two adjacent light-emitting elements, and being electrically connected to second electrode.

Abstract: A display module, including: a display panel; and a color film layer and a micro-lens layer, provided on a light-emitting side of the display panel; where, the color film layer includes a plurality of filter portions, and the micro-lens layer includes a plurality of first converging lenses and a plurality of second converging lenses; a gap is provided between two adjacent first converging lenses, and an orthographic projection of a first converging lens on the display panel is located within an orthographic projection of a filter portion on the display panel; a second converging lens is provided in the gap between two adjacent first converging lenses, and a vertex of the second converging lens is located between a vertex of the first converging lens and a bottom surface of the first converging lens.

Abstract: The present disclosure provides a display panel (PNL) and a display device. The display panel (PNL) comprises a display area (AA) and a binding area (BB) located on one side of the display area (AA); wherein, in the binding area (BB), there are multiple pads (PAD) arranged in sequence along a first direction DH; wherein, the multiple pads (PAD) comprise at least multiple first pads (PA) and multiple second pads (PB); each of the first pads (PA) comprises a first connection portion (PAY) and a first structure (PAX) located on one side of the first connection portion (PAY) near the display area (AA), a maximum width of the first structure (PAX) is greater than that of the first connection portion (PAY). The first structure (PAX) is located on one side of the second pad (PB) near the display area (AA).

Abstract: Provides are a display substrate and a display apparatus. The display substrate includes a base substrate, light-emitting devices and photosensitive devices on the base substrate in an array, orthographic projections of the photosensitive devices overlap orthographic projections of gaps of the light-emitting devices on the base substrate, each photosensitive device includes a photoelectric conversion layer, each photoelectric conversion layer includes at least one photoelectric conversion part; a black matrix on a side, away from the base substrate, of a layer where the light-emitting devices are; an orthographic projection of the black matrix overlaps the orthographic projections of the gaps of the light-emitting devices on the base substrate, the black matrix has openings, orthographic projections of the openings overlap the orthographic projections of the photoelectric conversion parts on the base substrate.

Abstract: A display panel and a display device. The display panel comprises a display substrate and a microlens layer. The display substrate comprises a plurality of subpixels; the plurality of subpixels comprise first subpixels, second subpixels, and third subpixels; and at least two of the light-emitting area of the first subpixel, the light-emitting area of the second subpixel, and the light-emitting area of the third subpixel are different. The microlens layer is arranged on the light exit side of the display substrate, and the microlens layer comprises a plurality of lenses. The subpixels are located in the orthographic projections of the lenses on the display substrate, and the centers of the subpixels are arranged opposite to the centers of the lenses.

Abstract: A display substrate, a preparation method therefor, and a display device. A display substrate includes a plurality of conductive layers disposed on a silicon-based substrate (101), a conductive layer includes a first sub-electrode plate (110) and a second sub-electrode plate (120), the first sub-electrode plate (110) and the second sub-electrode plate (120) form a first storage capacitor of a MOM capacitance structure, and another conductive layer comprises a third sub-electrode plate (130) and a fourth sub-electrode plate (140), the third sub-electrode plate (130) and the fourth sub-electrode plate (140) form a second storage capacitor of a MOM capacitance structure; the first sub-electrode plate (110) and the fourth sub-electrode plate (140) constitute a third storage capacitor of a MIM capacitance structure, and/or the second sub-electrode plate (120) and the third sub-electrode plate (130) constitute a fourth storage capacitor of a MIM capacitance structure.

Abstract: A display assembly includes a display panel and a light adjusting layer disposed on a light-emitting side of the display panel. The display panel has a middle display region and a peripheral display region, and is configured to project light towards an optical device. An orthographic projection of the light adjusting layer on the display panel at least partially overlaps with the peripheral display region. The light adjusting layer is configured to: deflect at least a portion of light emitted to a first region of the optical device and at least a portion of light emitted to an outer side of the optical device among light emitted from the peripheral display region, after passing therethrough; and emit the deflected light to a second region of the optical device. The second region is farther away from a center of the optical device than the first region.

Abstract: A display substrate includes: a driving backplane, a first electrode layer, an electric leakage cutoff layer, a light-emitting functional layer and a second electrode layer. The first electrode layer includes a plurality of first electrodes distributed in an array, there is a spacing groove between two adjacent first electrodes, a first electrode of the plurality of first electrodes includes a flat middle portion, a thickness of the light-emitting functional layer located between a gentle portion of the second electrode layer and the middle portion is d0 in a direction perpendicular to the driving backplane, the minimum value of the sum of a thickness of the electric leakage cutoff layer lapping over the middle portion and a thickness of the middle portion is d1, and a ratio of d1 to d0 is 0.3 to 1.

Abstract: A display substrate includes an array substrate including pixels and pixel driving circuits. A pixel driving circuit includes a driving sub-circuit and a storage sub-circuit. The storage sub-circuit includes: a first capacitor coupled to a first node and a second node, and a second capacitor coupled to the second node and a first voltage signal terminal. The driving sub-circuit is configured to generate a driving current under control of the storage sub-circuit and transmit the driving current to a light-emitting device. In a direction perpendicular to the array layer, the first plate, the second plate, the third plate and the fourth plate have an overlapping region therebetween.

Abstract: An array substrate is provided. The array substrate includes pixels arranged in a plurality of repeating units. The array substrate includes a plurality of source electrode connecting lines and a plurality of data connecting pads in the repeating unit, and a plurality of data lines. A respective source electrode connecting line of the plurality of source electrode connecting lines connects first electrodes of a first transistor and a second transistor in a respective pixel driving circuit together. The respective source electrode connecting line is further connected to a respective data connecting pad of the plurality of data connecting pads. The respective data connecting pad is connected to a respective data line of the plurality of data lines. A maximum width of the respective source electrode connecting line is greater than at least 75% of a maximum width of a respective anode.